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C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 1
C51 COMPILER V7.06, COMPILATION OF MODULE SPI
OBJECT MODULE PLACED IN SPI.OBJ
COMPILER INVOKED BY: E:\keil\C51\BIN\C51.EXE SPI.C BROWSE DEBUG OBJECTEXTEND
stmt level source
1 /**************************************
2 File : SPI.C
3 Project : BDTRV20_MCU_V07
4 Description :
5 Created : 2004
6 Last updata : 2004
7 Author : wangwenyu
8 Compile Tool : Keil
9 Target Device : SST89V564RD
10 Circuit Board : 7700
11 ************************************
12 Modification History
13 ************************************
14 Version : v1.4
15 Date : MM/DD/YYYY
16 Modifier :
17 Description :
18
19 **********************************
20 -- Copyright (c)
21 *************************************/
22
23 #include <SST89V564.H>
24 sbit WSCK = 0x97; //P17
25 sbit WSI = 0x95; //P15
26 sbit WSO = 0x96; //P16
27 sbit WCS = 0x91; //P11
28 sbit AD7 = ACC^7;
29 sbit AD6 = ACC^6;
30 sbit AD5 = ACC^5;
31 sbit AD4 = ACC^4;
32 sbit AD3 = ACC^3;
33 sbit AD2 = ACC^2;
34 sbit AD1 = ACC^1;
35 sbit AD0 = ACC^0;
36
37 extern wdt(void);
38 /*unsigned char MasterIO(unsigned char SPI_out)
39 {
40 unsigned char temp;
41 SPDR = SPI_out;
42 do {temp = SPSR & 0x80;}
43 while(temp != 0x80);
44 SPSR = 0x00;
45 return SPDR;
46 }*/
47
48
49 void WREN(void)//寫允許
50 {
51 1 ACC=0x06; //Write enable instruction.
52 1
53 1 WCS=0; //Chip selected.
54 1
55 1 WSCK=0; //Bit 7.
C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 2
56 1 WSI=AD7;
57 1 WSCK=1;
58 1 WSCK=0; //Bit 6.
59 1 WSI=AD6;
60 1 WSCK=1;
61 1 WSCK=0; //Bit 5.
62 1 WSI=AD5;
63 1 WSCK=1;
64 1 WSCK=0; //Bit 4.
65 1 WSI=AD4;
66 1 WSCK=1;
67 1 WSCK=0; //Bit 3.
68 1 WSI=AD3;
69 1 WSCK=1;
70 1 WSCK=0; //Bit 2.
71 1 WSI=AD2;
72 1 WSCK=1;
73 1 WSCK=0; //Bit 1.
74 1 WSI=AD1;
75 1 WSCK=1;
76 1 WSCK=0; //Bit 0.
77 1 WSI=AD0;
78 1 WSCK=1;
79 1
80 1 WCS=1; //Disable chip select.
81 1 }
82
83 /*void WRDI(void)//寫禁止
84 {
85 ACC=0x04; //Write disable instruction.
86
87 WCS=0; //Chip select.
88
89 WSCK=0; //Bit 7.
90 WSI=AD7;
91 WSCK=1;
92 WSCK=0; //Bit 6.
93 WSI=AD6;
94 WSCK=1;
95 WSCK=0; //Bit 5.
96 WSI=AD5;
97 WSCK=1;
98 WSCK=0; //Bit 4.
99 WSI=AD4;
100 WSCK=1;
101 WSCK=0; //Bit 3.
102 WSI=AD3;
103 WSCK=1;
104 WSCK=0; //Bit 2.
105 WSI=AD2;
106 WSCK=1;
107 WSCK=0; //Bit 1.
108 WSI=AD1;
109 WSCK=1;
110 WSCK=0; //Bit 0.
111 WSI=AD0;
112 WSCK=1;
113
114 WCS=1; //Disable chip select.
115 }*/
116 /*
117 unsigned char SDSR(void)//讀狀態寄存器
C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 3
118 {
119 ACC = 0x05; //Read Instruction 0x03.
120 WCS=0; //Chip select.
121 //Send read Instruction (0x03).
122 WSCK=0; //Bit 7.
123 WSI=AD7;
124 WSCK=1;
125 WSCK=0; //Bit 6.
126 WSI=AD6;
127 WSCK=1;
128 WSCK=0; //Bit 5.
129 WSI=AD5;
130 WSCK=1;
131 WSCK=0; //Bit 4.
132 WSI=AD4;
133 WSCK=1;
134 WSCK=0; //Bit 3.
135 WSI=AD3;
136 WSCK=1;
137 WSCK=0; //Bit 2.
138 WSI=AD2;
139 WSCK=1;
140 WSCK=0; //Bit 1.
141 WSI=AD1;
142 WSCK=1;
143 WSCK=0; //Bit 0.
144 WSI=AD0;
145 WSCK=1;
146
147 //Read data from X5045.
148 WSCK=0; //Bit 7.
149 AD7=WSO;
150 WSCK=1;
151 WSCK=0; //Bit 6.
152 AD6=WSO;
153 WSCK=1;
154 WSCK=0; //Bit 5.
155 AD5=WSO;
156 WSCK=1;
157 WSCK=0; //Bit 4.
158 AD4=WSO;
159 WSCK=1;
160 WSCK=0; //Bit 3.
161 AD3=WSO;
162 WSCK=1;
163 WSCK=0; //Bit 2.
164 AD2=WSO;
165 WSCK=1;
166 WSCK=0; //Bit 1.
167 AD1=WSO;
168 WSCK=1;
169 WSCK=0; //Bit 0.
170 AD0=WSO;
171 WSCK=1;
172
173 WCS=1; //Chip select disable.
174
175 return(ACC); //Return the data having read.
176 }
177
178 void WRSR(unsigned char byte)//寫狀態寄存器（看門狗和塊鎖定）
179 {
C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 4
180 ACC=0x01; //Write instruction.
181 WCS=0; //Chip select.
182
183 WSCK=0; //Bit 7.
184 WSI=AD7;
185 WSCK=1;
186 WSCK=0; //Bit 6.
187 WSI=AD6;
188 WSCK=1;
189 WSCK=0; //Bit 5.
190 WSI=AD5;
191 WSCK=1;
192 WSCK=0; //Bit 4.
193 WSI=AD4;
194 WSCK=1;
195 WSCK=0; //Bit 3.
196 WSI=AD3;
197 WSCK=1;
198 WSCK=0; //Bit 2.
199 WSI=AD2;
200 WSCK=1;
201 WSCK=0; //Bit 1.
202 WSI=AD1;
203 WSCK=1;
204 WSCK=0; //Bit 0.
205 WSI=AD0;
206 WSCK=1;
207
208 ACC= byte; //Write 1st byte.
209 WSCK=0; //Bit 7.
210 WSI=AD7;
211 WSCK=1;
212 WSCK=0; //Bit 6.
213 WSI=AD6;
214 WSCK=1;
215 WSCK=0; //Bit 5.
216 WSI=AD5;
217 WSCK=1;
218 WSCK=0; //Bit 4.
219 WSI=AD4;
220 WSCK=1;
221 WSCK=0; //Bit 3.
222 WSI=AD3;
223 WSCK=1;
224 WSCK=0; //Bit 2.
225 WSI=AD2;
226 WSCK=1;
227 WSCK=0; //Bit 1.
228 WSI=AD1;
229 WSCK=1;
230 WSCK=0; //Bit 0.
231 WSI=AD0;
232 WSCK=1;
233
234 WCS=1; //Chip unselected.
235 }
236 */
237 unsigned char READ(unsigned char CMD,unsigned char addr)
238 {
239 1 //unsigned int j = 0x0200;
240 1 //while(j!=0){j--;}
241 1 wdt();
C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 5
242 1 ACC = CMD; //Read Instruction 0x03.
243 1 WCS=0; //Chip select.
244 1 //Send read Instruction (0x03).
245 1 WSCK=0; //Bit 7.
246 1 WSI=AD7;
247 1 WSCK=1;
248 1 WSCK=0; //Bit 6.
249 1 WSI=AD6;
250 1 WSCK=1;
251 1 WSCK=0; //Bit 5.
252 1 WSI=AD5;
253 1 WSCK=1;
254 1 WSCK=0; //Bit 4.
255 1 WSI=AD4;
256 1 WSCK=1;
257 1 WSCK=0; //Bit 3.
258 1 WSI=AD3;
259 1 WSCK=1;
260 1 WSCK=0; //Bit 2.
261 1 WSI=AD2;
262 1 WSCK=1;
263 1 WSCK=0; //Bit 1.
264 1 WSI=AD1;
265 1 WSCK=1;
266 1 WSCK=0; //Bit 0.
267 1 WSI=AD0;
268 1 WSCK=1;
269 1
270 1 ACC=addr;
271 1 WSCK=0; //Bit 7.
272 1 WSI=AD7;
273 1 WSCK=1;
274 1 WSCK=0; //Bit 6.
275 1 WSI=AD6;
276 1 WSCK=1;
277 1 WSCK=0; //Bit 5.
278 1 WSI=AD5;
279 1 WSCK=1;
280 1 WSCK=0; //Bit 4.
281 1 WSI=AD4;
282 1 WSCK=1;
283 1 WSCK=0; //Bit 3.
284 1 WSI=AD3;
285 1 WSCK=1;
286 1 WSCK=0; //Bit 2.
287 1 WSI=AD2;
288 1 WSCK=1;
289 1 WSCK=0; //Bit 1.
290 1 WSI=AD1;
291 1 WSCK=1;
292 1 WSCK=0; //Bit 0.
293 1 WSI=AD0;
294 1 WSCK=1;
295 1
296 1 //Read data from X5045.
297 1 WSCK=0; //Bit 7.
298 1 AD7=WSO;
299 1 WSCK=1;
300 1 WSCK=0; //Bit 6.
301 1 AD6=WSO;
302 1 WSCK=1;
303 1 WSCK=0; //Bit 5.
C51 COMPILER V7.06 SPI 11/19/2006 10:57:51 PAGE 6
304 1 AD5=WSO;
305 1 WSCK=1;
306 1 WSCK=0; //Bit 4.
307 1 AD4=WSO;
308 1 WSCK=1;
309 1 WSCK=0; //Bit 3.
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