** This routine is the system start-up entry point for VxWorks in RAM, the* first code executed after booting.  It disables interrupts, sets up* the stack, and jumps to the C routine usrInit() in usrConfig.c.** The initial stack is set to grow down from the address of sysInit().  This* stack is used only by usrInit() and is never used again.  Memory for the* stack must be accounted for when determining the system load address.** NOTE: This routine should not be called by the user.** RETURNS: N/A* sysInit ()              /@ THIS IS NOT A CALLABLE ROUTINE @/ */_ARM_FUNCTION(sysInit)/* Disable Interrupts */        MRS     r1, cpsr                /* get current status */        ORR     r1, r1, #I_BIT | F_BIT  /* disable IRQ and FIQ */        MSR     cpsr, r1        mov     r0, #0                 /* Disable IRQ and FIQ Masks */        mcr     p13, 0, r0, c0, c0, 0/* Interrupts Disabled */        ldr     r0, =IQ80310_PAL_INT_STATUS_MASK /* Zero-out Interrupt Mask */        mov     r2, #0x1f        strb    r2, [r0]	adr	sp, FUNC(sysInit)	/* initialise stack pointer */	mov	fp, #0		/* initialise frame pointer */        mov     r0, #BOOT_WARM_AUTOBOOT /* pass startType *//* now call usrInit */	b	FUNC(usrInit)#endif /* INCLUDE_HSI_PROBE *//********************************************************************************* sysIntStackSplit - split interrupt stack and set interrupt stack pointers** This routine is called, via a function pointer, during kernel* initialisation.  It splits the allocated interrupt stack into IRQ and* SVC-mode stacks and sets the processor's IRQ stack pointer. Note that* the pointer passed points to the bottom of the stack allocated i.e.* highest address+1.** NOMANUAL* void sysIntStackSplit*     (*     char *pBotStack   /@ pointer to bottom of interrupt stack @/*     long size		/@ size of stack @/*     )*/_ARM_FUNCTION_CALLED_FROM_C(sysIntStackSplit)/* * Split stack into 2 - IRQ and SVC-mode interrupt stacks. * IRQ stack needs 6 words per nested interrupt; * SVC-mode will need a good deal more for the C interrupt handlers. * For now, use ratio 1:7 with any excess allocated to the SVC-mode stack * at the lowest address. * * Note that FIQ is not handled by VxWorks so no stack is allocated for it. * * The stacks and the variables that describe them look like this. * *         - HIGH MEMORY - *     ------------------------ <--- vxIrqIntStackBase (r0 on entry) *     |                      |   *     |       IRQ-mode       |   *     |    interrupt stack   | *     |                      |   *     ------------------------ <--{ vxIrqIntStackEnd *     |                      |    { vxSvcIntStackBase *     |       SVC-mode       |   *     |    interrupt stack   | *     |                      |   *     ------------------------ <--- vxSvcIntStackEnd *         - LOW  MEMORY - * * * r0 = base of space allocated for stacks (i.e. highest address) * r1 = size of space */         SUB     r2,r0,r1                /* r2 -> lowest usable address */        LDR     r3,L$_vxSvcIntStackEnd        STR     r2,[r3]                 /*  == end of SVC-mode stack */        SUB     r2,r0,r1,ASR #3         /* leave 1/8 for IRQ */        LDR     r3,L$_vxSvcIntStackBase        STR     r2,[r3] /* now allocate IRQ stack, setting irq_sp */         LDR     r3,L$_vxIrqIntStackEnd        STR     r2,[r3]        LDR     r3,L$_vxIrqIntStackBase        STR     r0,[r3]         MRS     r2,cpsr        BIC     r3,r2,#MASK_MODE        ORR     r3,r3,#MODE_IRQ32 | I_BIT       /* set irq_sp */        MSR     cpsr,r3        MOV     sp,r0 /* switch back to original mode and return */         MSR     cpsr,r2        MOV     pc,lr_ARM_FUNCTION_CALLED_FROM_C(sysEnableIRQMasks)        mov     r0, #3                  /* Enable IRQ and FIQ */        mcr     p13, 0, r0, c0, c0, 0        mov     pc, lr/****************************************************************************** sysICUReadINTSRC - Read the INTSRC register.** Read the INTSRC register on cp13, register 4 to determine the cause for the* the interrupt.** RETURNS:       UINT32 containing the value of INTSRC register.*/_ARM_FUNCTION_CALLED_FROM_C(sysICUReadINTSRC)        mrc     p13, 0, r0, c4, c0, 0   /* Read the INTSRC register */        mov     pc, lr/****************************************************************************** sysGetTransTblBase - Get Translation Table Base register.** RETURNS:       UINT32 containing the Translation Table Base.*/_ARM_FUNCTION_CALLED_FROM_C(sysGetTransTblBase)        mrc     p15, 0, r0, c2, c0, 0   /* Get Translation Table Base register */        ldr     r1, =0xffffc000        and     r0, r0, r1              /* remove reserved bits                */        mov     pc, lr/* Retrieve auto-sized memory. *//* UINT32 sysPhysMemSize(void) */_ARM_FUNCTION_CALLED_FROM_C(sysPhysMemSize)        ldr     r0, =I80312_BASE                 /* 80312 Base address */        ldr     r3, [r0, #I80312_INDEX_SBR0]     /* load SBR0 */CHECK_32MB:        ldr     r1, =SBR_32MEG                   /* do we have 32 MB bank? */        and     r2, r3, r1        cmp     r2, r1        bne     CHECK_64MB        mov     r0, #SZ_32M                      /* return 32 MB*/        b       GET_SBR1CHECK_64MB:        ldr     r1, =SBR_64MEG                   /* do we have 64 MB bank? */        and     r2, r3, r1        cmp     r2, r1        bne     CHECK_128MB        mov     r0, #SZ_64M                      /* return 64 MB*/        b       GET_SBR1CHECK_128MB:        ldr     r1, =SBR_128MEG                  /* do we have 128 MB bank? */        and     r2, r3, r1        cmp     r2, r1        bne     CHECK_256MB        mov     r0, #SZ_128M                     /* return 128 MB*/        b       GET_SBR1CHECK_256MB:        ldr     r1, =SBR_256MEG                  /* do we have 256 MB bank? */        and     r2, r3, r1        cmp     r2, r1        bne     size_error        mov     r0, #SZ_256M                     /* return 256 MB*/        b       GET_SBR1size_error:/* Disable Interrupts */        MRS     r1, cpsr                         /* get current status */        ORR     r1, r1, #I_BIT | F_BIT           /* disable IRQ and FIQ */        MSR     cpsr, r1        mov     r0, #0                           /* Disable IRQ and FIQ Masks */        mcr     p13, 0, r0, c0, c0, 0/* Interrupts Disabled */        ldr     r0, =IQ80310_PAL_INT_STATUS_MASK /* Zero-out Interrupt Mask */        mov     r2, #0x1f        strb    r2, [r0]display_bad_ram:/* Display 0MB */#ifdef SECOND_HEX_LED        mov     r0, #L7SEG_B        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r0, [r2]#endif        mov     r1, #L7SEG_r        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]        b       display_bad_ramGET_SBR1:        ldr     r1, =I80312_BASE                 /* 80312 Base address */        ldr     r2, [r1, #I80312_INDEX_SBR1]     /* load SBR1 */        cmp     r3, r2                           /* do we have 2 banks???, if equal 1 bank */        beq     size_done        add     r0, r0, r0                       /* SDRAM Bank1 Boundary register is double SBR0 */size_done:DISPLAY_32MB:        mov     r1, #SZ_32M                      /* return 32 MB*/        cmp     r0, r1        bne     DISPLAY_64MB/* Display 32MB */#ifdef SECOND_HEX_LED        mov     r3, #L7SEG_3        mov     r1, #L7SEG_2        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r3, [r2]        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]#endif        b       ALL_DONE_NOWDISPLAY_64MB:        mov     r1, #SZ_64M                      /* return 64 MB*/        cmp     r0, r1        bne     DISPLAY_128MB/* Display 64MB */#ifdef SECOND_HEX_LED        mov     r3, #L7SEG_6        mov     r1, #L7SEG_4        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r3, [r2]        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]#endif         b       ALL_DONE_NOWDISPLAY_128MB:        mov     r1, #SZ_128M                      /* return 128 MB*/        cmp     r0, r1        bne     DISPLAY_256MB/* Display 128MB */#ifdef SECOND_HEX_LED        mov     r3, #L7SEG_2        mov     r1, #L7SEG_8        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r3, [r2]        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]#endif         b       ALL_DONE_NOWDISPLAY_256MB:        mov     r1, #SZ_256M                      /* return 256 MB*/        cmp     r0, r1        bne     DISPLAY_512MB/* Display 256MB */#ifdef SECOND_HEX_LED        mov     r3, #L7SEG_5        mov     r1, #L7SEG_6        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r3, [r2]        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]#endif         b       ALL_DONE_NOWDISPLAY_512MB:/* Display 512MB */#ifdef SECOND_HEX_LED        mov     r3, #L7SEG_1        mov     r1, #L7SEG_2        ldr     r2, =IQ80310_7SEG_BASE_MSB        strb    r3, [r2]        ldr     r2, =IQ80310_7SEG_BASE_LSB        strb    r1, [r2]#endif ALL_DONE_NOW:        mov     pc, lrL$_vxSvcIntStackBase:	.long	VAR(vxSvcIntStackBase)L$_vxSvcIntStackEnd:	.long	VAR(vxSvcIntStackEnd)L$_vxIrqIntStackBase:	.long	VAR(vxIrqIntStackBase)L$_vxIrqIntStackEnd:	.long	VAR(vxIrqIntStackEnd)	/***EOF***/