* filename : bsp.inc                                                                    *
* - contains organisation of DSP McBSP 1 registers                                         *

SPSA        .set 0048H  ; MCBSP1 sub-address register
SPCR1       .set 0049H  ; MCBSP1 control register 1 
SPCR2       .set 0049H  ; MCBSP1 control register 2
XCR1        .set 0049H  ; MCBSP1 transmit control register 1
XCR2        .set 0049H  ; MCBSP1 transmit control register 2
SRGR1       .set 0049H  ; MCBSP1 sample rate genarator register 1
SRGR2       .set 0049H  ; MCBSP1 sample rate genarator register 2

SPCR1_SUB   .set 0000H  ; Serial port control register 1 (subaddress)
SPCR2_SUB   .set 0001H  ; Serial port control register 2 (subaddress)
RCR1_SUB    .set 0002H  ; Serial port transmit control register 1 (subaddress)
RCR2_SUB    .set 0003H  ; Serial port transmit control register 1 (subaddress)
XCR1_SUB    .set 0004H  ; Serial port transmit control register 1 (subaddress)
XCR2_SUB    .set 0005H  ; Serial port transmit control register 1 (subaddress)
SRGR1_SUB   .set 0006H  ; Serial port sample rate genarator register 1 (subaddress)
SRGR2_SUB   .set 0007H  ; Serial port sample rate genarator register 2 (subaddress)
PCR_SUB     .set 000EH  ; Serial port pin control register (subaddress)

K_XIOEN		.set 0010000000000000b ; set XIOEN enable
K_RIOEN 	.set 0001000000000000b ; set RIOEN enable
K_FSXM  	.set 0000000000000000b ; set FSX as input
K_FSRM  	.set 0000010000000000b ; set FSR as output
K_DX_STAT_1	.set 0000000000100000b ; mask DX_STAT bit ON
K_DX_STAT_0	.set 1111111111011111b ; mask DX_STAT bit OFF
K_DR_STAT_1	.set 0000000000010000b ; mask DR_STAT bit ON
K_DR_STAT_0	.set 1111111111101111b ; mask DR_STAT bit OFF
K_FSXP_1	.set 0000000000001000b ; mask FSXP bit
K_FSXP_0	.set 1111111111110111b ; mask FSXP bit
K_FSRP_1	.set 0000000000000100b ; mask FSRP bit
K_FSRP_0	.set 1111111111111011b ; mask FSRP bit