?? cpld_qq2812.rpt
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Project Information e:\code\cpld_qq2812\cpld_qq2812.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 05/26/2008 14:44:37
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Shareable
POF Device Pins Pins Pins LCs Expanders % Utilized
cpld_qq2812
EPM3256ATC144-7 51 49 8 82 25 32 %
User Pins: 51 49 8
Project Information e:\code\cpld_qq2812\cpld_qq2812.rpt
** PROJECT COMPILATION MESSAGES **
Info: Reserved unused input pin 'IFCLK' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'CLKOUT' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'RXB' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Warning: Node 'DSP_' has assignments but doesn't exist or is a primitive array -- edit the project's ACF to fix the problem
Project Information e:\code\cpld_qq2812\cpld_qq2812.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
cpld_qq2812@90 ACICS
cpld_qq2812@47 BUZZER
cpld_qq2812@48 CANRX
cpld_qq2812@139 CANRX_1
cpld_qq2812@49 CANTX
cpld_qq2812@138 CANTX_1
cpld_qq2812@62 CLKOUT
cpld_qq2812@65 CS1
cpld_qq2812 --------- DSP_
cpld_qq2812@44 DSP_Add0
cpld_qq2812@45 DSP_Add1
cpld_qq2812@43 DSP_Add2
cpld_qq2812@46 DSP_Add3
cpld_qq2812@41 DSP_Add4
cpld_qq2812@42 DSP_Add5
cpld_qq2812@69 DSP_Data0
cpld_qq2812@68 DSP_Data1
cpld_qq2812@54 DSP_Data2
cpld_qq2812@67 DSP_Data3
cpld_qq2812@60 DSP_Data4
cpld_qq2812@66 DSP_Data5
cpld_qq2812@61 DSP_Data6
cpld_qq2812@53 DSP_Data7
cpld_qq2812@120 E
cpld_qq2812@113 EXINT0
cpld_qq2812@116 EXINT1
cpld_qq2812@117 EXINT2
cpld_qq2812@118 EXINT3
cpld_qq2812@140 EXINT4
cpld_qq2812@79 FIFO_EMPTY
cpld_qq2812@80 FIFO_FULL
cpld_qq2812@81 FIFO_PROG
cpld_qq2812@82 IFCLK
cpld_qq2812@39 INT1
cpld_qq2812@110 IN0
cpld_qq2812@109 IN1
cpld_qq2812@108 IN2
cpld_qq2812@107 IN3
cpld_qq2812@106 IN4
cpld_qq2812@103 IN5
cpld_qq2812@102 IN6
cpld_qq2812@101 IN7
cpld_qq2812@100 IN8
cpld_qq2812@99 IN9
cpld_qq2812@98 IN10
cpld_qq2812@97 IN11
cpld_qq2812@96 IN12
cpld_qq2812@93 IN13
cpld_qq2812@92 IN14
cpld_qq2812@91 IN15
cpld_qq2812@141 Key0
cpld_qq2812@7 Key1
cpld_qq2812@8 Key2
cpld_qq2812@6 Key3
cpld_qq2812@5 Key4
cpld_qq2812@2 Key5
cpld_qq2812@1 Key6
cpld_qq2812@143 Key7
cpld_qq2812@121 LCD_Data0
cpld_qq2812@122 LCD_Data1
cpld_qq2812@131 LCD_Data2
cpld_qq2812@132 LCD_Data3
cpld_qq2812@133 LCD_Data4
cpld_qq2812@134 LCD_Data5
cpld_qq2812@136 LCD_Data6
cpld_qq2812@137 LCD_Data7
cpld_qq2812@142 LED0
cpld_qq2812@9 LED1
cpld_qq2812@10 LED2
cpld_qq2812@11 LED3
cpld_qq2812@12 LED4
cpld_qq2812@14 LED5
cpld_qq2812@15 LED6
cpld_qq2812@16 LED7
cpld_qq2812@40 NMI
cpld_qq2812@111 NMI1
cpld_qq2812@112 NMI2
cpld_qq2812@18 OUT0
cpld_qq2812@19 OUT1
cpld_qq2812@21 OUT2
cpld_qq2812@22 OUT3
cpld_qq2812@23 OUT4
cpld_qq2812@25 OUT5
cpld_qq2812@27 OUT6
cpld_qq2812@28 OUT7
cpld_qq2812@29 OUT8
cpld_qq2812@30 OUT9
cpld_qq2812@31 OUT10
cpld_qq2812@32 OUT11
cpld_qq2812@34 OUT12
cpld_qq2812@35 OUT13
cpld_qq2812@36 OUT14
cpld_qq2812@37 OUT15
cpld_qq2812@72 PATEND
cpld_qq2812@78 PA0
cpld_qq2812@75 PA1
cpld_qq2812@63 RD
cpld_qq2812@119 RS
cpld_qq2812@84 RXB
cpld_qq2812@87 SICLK
cpld_qq2812@88 SIDIN
cpld_qq2812@71 SLCS
cpld_qq2812@74 SLOE
cpld_qq2812@55 SLRD
cpld_qq2812@56 SLWR
cpld_qq2812@38 SPI_CS
cpld_qq2812@86 TXB
cpld_qq2812@83 TXB1
cpld_qq2812@70 WR
Device-Specific Information: e:\code\cpld_qq2812\cpld_qq2812.rpt
cpld_qq2812
***** Logic for device 'cpld_qq2812' compiled without errors.
Device: EPM3256ATC144-7
Device Options:
Turbo Bit = ON
Security Bit = OFF
Enable JTAG Support = ON
User Code = ffffffff
MultiVolt I/O = OFF
Device-Specific Information: e:\code\cpld_qq2812\cpld_qq2812.rpt
cpld_qq2812
** ERROR SUMMARY **
Info: Chip 'cpld_qq2812' in device 'EPM3256ATC144-7' has less than 20% of pins available for future logic changes -- if your project is likely to change, Altera recommends using a larger device
L L L L L L L L
C C C C C C C C
C C D D D D D D D D
E A A _ _ _ _ _ _ V V _ _ E E E E
V X N N D D D D D D C C D D X X X V X
C K L K I R T a a a a a a C C a a I I I C I N N
C e E e N X X t t G t t t t I G G G G G G I t t N N N C G N M M I I
I y D y T _ _ a a N a a a a N N N N N N N N a a R T T T I N T I I N N
O 7 0 0 4 1 1 7 6 D 5 4 3 2 T D D D D D D T 1 0 E S 3 2 1 O D 0 2 1 0 1
--------------------------------------------------------------------------_
/ 144 142 140 138 136 134 132 130 128 126 124 122 120 118 116 114 112 110 |_
/ 143 141 139 137 135 133 131 129 127 125 123 121 119 117 115 113 111 109 |
Key6 | 1 108 | IN2
Key5 | 2 107 | IN3
GND | 3 106 | IN4
#TDI | 4 105 | GND
Key4 | 5 104 | #TDO
Key3 | 6 103 | IN5
Key1 | 7 102 | IN6
Key2 | 8 101 | IN7
LED1 | 9 100 | IN8
LED2 | 10 99 | IN9
LED3 | 11 98 | IN10
LED4 | 12 97 | IN11
GND | 13 96 | IN12
LED5 | 14 95 | VCCIO
LED6 | 15 94 | GND
LED7 | 16 93 | IN13
GND | 17 92 | IN14
OUT0 | 18 91 | IN15
OUT1 | 19 EPM3256ATC144-7 90 | ACICS
#TMS | 20 89 | #TCK
OUT2 | 21 88 | SIDIN
OUT3 | 22 87 | SICLK
OUT4 | 23 86 | TXB
VCCIO | 24 85 | GND
OUT5 | 25 84 | RXB
GND | 26 83 | TXB1
OUT6 | 27 82 | IFCLK
OUT7 | 28 81 | FIFO_PROG
OUT8 | 29 80 | FIFO_FULL
OUT9 | 30 79 | FIFO_EMPTY
OUT10 | 31 78 | PA0
OUT11 | 32 77 | GND
GND | 33 76 | VCCIO
OUT12 | 34 75 | PA1
OUT13 | 35 74 | SLOE
OUT14 | 36 73 | VCCIO
| 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 _|
\ 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 |
\---------------------------------------------------------------------------
O S I N D D D D D D B C C V V G D D S S G V G D D C R G C D D D D W S P
U P N M S S S S S S U A A C C N S S L L N C N S S L D N S S S S S R L A
T I T I P P P P P P Z N N C C D P P R W D C D P P K D 1 P P P P C T
1 _ 1 _ _ _ _ _ _ Z R T I I _ _ D R I _ _ O _ _ _ _ S E
5 C A A A A A A E X X O N D D N D D U D D D D N
S d d d d d d R T a a T a a T a a a a D
d d d d d d t t t t t t t t
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