#define GPIO1_FIOSET    (*(pREG32 (0x3fffc038)))#define GPIO1_FIOSETL   (*(pREG16 (0x3fffc038)))#define GPIO1_FIOSET0   (*(pREG8  (0x3fffc038)))#define GPIO1_FIOSET1   (*(pREG8  (0x3fffc039)))#define GPIO1_FIOSETH   (*(pREG16 (0x3fffc03a)))#define GPIO1_FIOSET2   (*(pREG8  (0x3fffc03a)))#define GPIO1_FIOSET3   (*(pREG8  (0x3fffc03b)))#define GPIO1_FIOCLR    (*(pREG32 (0x3fffc03c)))#define GPIO1_FIOCLRL   (*(pREG16 (0x3fffc03c)))#define GPIO1_FIOCLR0   (*(pREG8  (0x3fffc03c)))#define GPIO1_FIOCLR1   (*(pREG8  (0x3fffc03d)))#define GPIO1_FIOCLRH   (*(pREG16 (0x3fffc03e)))#define GPIO1_FIOCLR2   (*(pREG8  (0x3fffc03e)))#define GPIO1_FIOCLR3   (*(pREG8  (0x3fffc03f)))#define GPIO_IO_P0      ((unsigned int) 0x00000001)#define GPIO_IO_P1      ((unsigned int) 0x00000002)#define GPIO_IO_P2      ((unsigned int) 0x00000004)#define GPIO_IO_P3      ((unsigned int) 0x00000008)#define GPIO_IO_P4      ((unsigned int) 0x00000010)#define GPIO_IO_P5      ((unsigned int) 0x00000020)#define GPIO_IO_P6      ((unsigned int) 0x00000040)#define GPIO_IO_P7      ((unsigned int) 0x00000080)#define GPIO_IO_P8      ((unsigned int) 0x00000100)#define GPIO_IO_P9      ((unsigned int) 0x00000200)#define GPIO_IO_P10     ((unsigned int) 0x00000400)#define GPIO_IO_P11     ((unsigned int) 0x00000800)#define GPIO_IO_P12     ((unsigned int) 0x00001000)#define GPIO_IO_P13     ((unsigned int) 0x00002000)#define GPIO_IO_P14     ((unsigned int) 0x00004000)#define GPIO_IO_P15     ((unsigned int) 0x00008000)#define GPIO_IO_P16     ((unsigned int) 0x00010000)#define GPIO_IO_P17     ((unsigned int) 0x00020000)#define GPIO_IO_P18     ((unsigned int) 0x00040000)#define GPIO_IO_P19     ((unsigned int) 0x00080000)#define GPIO_IO_P20     ((unsigned int) 0x00100000)#define GPIO_IO_P21     ((unsigned int) 0x00200000)#define GPIO_IO_P22     ((unsigned int) 0x00400000)#define GPIO_IO_P23     ((unsigned int) 0x00800000)#define GPIO_IO_P24     ((unsigned int) 0x01000000)#define GPIO_IO_P25     ((unsigned int) 0x02000000)#define GPIO_IO_P26     ((unsigned int) 0x04000000)#define GPIO_IO_P27     ((unsigned int) 0x08000000)#define GPIO_IO_P28     ((unsigned int) 0x10000000)#define GPIO_IO_P29     ((unsigned int) 0x20000000)#define GPIO_IO_P30     ((unsigned int) 0x40000000)#define GPIO_IO_P31     ((unsigned int) 0x80000000)#define GPIO_IO_ALL     ((unsigned int) 0xffffffff)#define GPIO_IO_JTAG    ((unsigned int) 0x003e0000)/*################################################################################ UART0 / UART1##############################################################################*/#define UART0_RBR       (*(pREG32 (0xe000c000)))#define UART0_THR       (*(pREG32 (0xe000c000)))#define UART0_IER       (*(pREG32 (0xe000c004)))#define UART0_IIR       (*(pREG32 (0xe000c008)))#define UART0_FCR       (*(pREG32 (0xe000c008)))#define UART0_LCR       (*(pREG32 (0xe000c00c)))#define UART0_LSR       (*(pREG32 (0xe000c014)))#define UART0_SCR       (*(pREG32 (0xe000c01c)))#define UART0_ACR       (*(pREG32 (0xe0000020)))#define UART0_FDR       (*(pREG32 (0xe0000028)))#define UART0_TER       (*(pREG32 (0xe0000030)))#define UART0_DLL       (*(pREG32 (0xe000c000)))#define UART0_DLM       (*(pREG32 (0xe000c004)))#define UART1_RBR       (*(pREG32 (0xe0010000)))#define UART1_THR       (*(pREG32 (0xe0010000)))#define UART1_IER       (*(pREG32 (0xe0010004)))#define UART1_IIR       (*(pREG32 (0xe0010008)))#define UART1_FCR       (*(pREG32 (0xe0010008)))#define UART1_LCR       (*(pREG32 (0xe001000c)))#define UART1_LSR       (*(pREG32 (0xe0010014)))#define UART1_SCR       (*(pREG32 (0xe001001c)))#define UART1_ACR       (*(pREG32 (0xe0010020)))#define UART1_FDR       (*(pREG32 (0xe0010028)))#define UART1_TER       (*(pREG32 (0xe0010030)))#define UART1_DLL       (*(pREG32 (0xe0010000)))#define UART1_DLM       (*(pREG32 (0xe0010004)))#define UART1_MCR       (*(pREG32 (0xe0010010)))#define UART1_MSR       (*(pREG32 (0xe0010018)))#define UART_LCR_DLAB   (0x00000080)#define UART_LCR_NOPAR  (0x00000000)#define UART_LCR_1STOP  (0x00000000)#define UART_LCR_8BITS  (0x00000003)#define UART_IER_EI     (0x00000003)#define UART_FCR_EN     (0x00000001)#define UART_FCR_CLR    (0x00000006)/*################################################################################ I2C##############################################################################*/#define I2C0_CONSET         (*(pREG32 (0xe001c000)))#define I2C0_STAT           (*(pREG32 (0xe001c004)))#define I2C0_DAT            (*(pREG32 (0xe001c008)))#define I2C0_ADR            (*(pREG32 (0xe001c00c)))#define I2C0_SCLH           (*(pREG32 (0xe001c010)))#define I2C0_SCLL           (*(pREG32 (0xe001c014)))#define I2C0_CONCLR         (*(pREG32 (0xe001c018)))#define I2C1_CONSET         (*(pREG32 (0xe005c000)))#define I2C1_STAT           (*(pREG32 (0xe005c004)))#define I2C1_DAT            (*(pREG32 (0xe005c008)))#define I2C1_ADR            (*(pREG32 (0xe005c00c)))#define I2C1_SCLH           (*(pREG32 (0xe005c010)))#define I2C1_SCLL           (*(pREG32 (0xe005c014)))#define I2C1_CONCLR         (*(pREG32 (0xe005c018)))#define I2C_CONSET_AA       (0x00000004)#define I2C_CONSET_SI       (0x00000008)#define I2C_CONSET_STO      (0x00000010)#define I2C_CONSET_STA      (0x00000020)#define I2C_CONSET_I2EN     (0x00000040)#define I2C_CONSET_MASK     (0x0000007c)#define I2C_STAT_STATMASK   (0x000000f8)#define I2C_STAT_STATSHIFT  (3)#define I2C_ADDR_GC         (0x00000001)#define I2C_ADDR_ADDRMASK   (0x000000fe)#define I2C_ADDR_ADDRSHIFT  (1)#define I2C_CONCLR_AAC      (0x00000004)#define I2C_CONCLR_SIC      (0x00000008)#define I2C_CONCLR_STAC     (0x00000020)#define I2C_CONCLR_I2ENC    (0x00000040)#define I2C_CONCLR_MASK     (0x0000006c)/*################################################################################ SPI - Serial Peripheral Interface##############################################################################*/#define SPI_SPCR        (*(pREG32 (0xe0020000)))#define SPI_SPSR        (*(pREG32 (0xe0020004)))#define SPI_SPDR        (*(pREG32 (0xe0020008)))#define SPI_SPCCR       (*(pREG32 (0xe002000c)))#define SPI_SPINT       (*(pREG32 (0xe002001c)))#define SPI_SPCR_BITENABLE    ((unsigned int) 0x00000004)#define SPI_SPCR_CPHA         ((unsigned int) 0x00000008)#define SPI_SPCR_CPHA1ST      ((unsigned int) 0x00000000)#define SPI_SPCR_CPHA2ND      ((unsigned int) 0x00000008)#define SPI_SPCR_CPOL         ((unsigned int) 0x00000010)#define SPI_SPCR_CPOLACTHIGH  ((unsigned int) 0x00000000)#define SPI_SPCR_CPOLACTLOW   ((unsigned int) 0x00000010)#define SPI_SPCR_SLAVE        ((unsigned int) 0x00000000)#define SPI_SPCR_MSTR         ((unsigned int) 0x00000020)#define SPI_SPCR_MSBF         ((unsigned int) 0x00000000)#define SPI_SPCR_LSBF         ((unsigned int) 0x00000040)#define SPI_SPCR_SPIE         ((unsigned int) 0x00000080)#define SPI_SPCR_BITS8        ((unsigned int) 0x00000800)#define SPI_SPCR_BITS9        ((unsigned int) 0x00000900)#define SPI_SPCR_BITS10       ((unsigned int) 0x00000a00)#define SPI_SPCR_BITS11       ((unsigned int) 0x00000b00)#define SPI_SPCR_BITS12       ((unsigned int) 0x00000c00)#define SPI_SPCR_BITS13       ((unsigned int) 0x00000d00)#define SPI_SPCR_BITS14       ((unsigned int) 0x00000e00)#define SPI_SPCR_BITS15       ((unsigned int) 0x00000f00)#define SPI_SPCR_BITS16       ((unsigned int) 0x00000000)#define SPI_SPCR_BITSMASK     ((unsigned int) 0x00000f00)#define SPI_SPSR_ABRT         ((unsigned int) 0x00000008)#define SPI_SPSR_MODF         ((unsigned int) 0x00000010)#define SPI_SPSR_ROVR         ((unsigned int) 0x00000020)#define SPI_SPSR_WCOL         ((unsigned int) 0x00000040)#define SPI_SPSR_SPIF         ((unsigned int) 0x00000080)#define SPI_SPINT_INTFLAG     ((unsigned int) 0x00000001)/*################################################################################ SSP - Synchronous Serial Port##############################################################################*/#define SSP_CR0         (*(pREG32 (0xe0068000)))#define SSP_CR1         (*(pREG32 (0xe0068004)))#define SSP_DR          (*(pREG32 (0xe0068008)))#define SSP_SR          (*(pREG32 (0xe006800C)))#define SSP_CPSR        (*(pREG32 (0xe0068010)))#define SSP_IMSC        (*(pREG32 (0xe0068014)))#define SSP_RIS         (*(pREG32 (0xe0068018)))#define SSP_MIS         (*(pREG32 (0xe006801C)))#define SSP_ICR         (*(pREG32 (0xe0068020)))#define SSP_FIFO_DEPTH  (8)#define SSP_CR0_DSS_4   ((unsigned int) 0x00000003)#define SSP_CR0_DSS_5   ((unsigned int) 0x00000004)#define SSP_CR0_DSS_6   ((unsigned int) 0x00000005)#define SSP_CR0_DSS_7   ((unsigned int) 0x00000006)#define SSP_CR0_DSS_8   ((unsigned int) 0x00000007)#define SSP_CR0_DSS_9   ((unsigned int) 0x00000008)#define SSP_CR0_DSS 10  ((unsigned int) 0x00000009)#define SSP_CR0_DSS_11  ((unsigned int) 0x0000000a)#define SSP_CR0_DSS_12  ((unsigned int) 0x0000000b)#define SSP_CR0_DSS_13  ((unsigned int) 0x0000000c)#define SSP_CR0_DSS_14  ((unsigned int) 0x0000000d)#define SSP_CR0_DSS_15  ((unsigned int) 0x0000000e)#define SSP_CR0_DSS_16  ((unsigned int) 0x0000000f)#define SSP_CR0_FRF_SPI ((unsigned int) 0x00000000)#define SSP_CR0_FRF_SSI ((unsigned int) 0x00000010)#define SSP_CR0_FRF_MW  ((unsigned int) 0x00000020)#define SSP_CR0_CPOL    ((unsigned int) 0x00000040)#define SSP_CR0_CPHA    ((unsigned int) 0x00000080)#define SSP_CR0_SCR     ((unsigned int) 0x0000ff00)#define SSP_CR1_LBM     ((unsigned int) 0x00000001)#define SSP_CR1_SSE     ((unsigned int) 0x00000002)#define SSP_CR1_MS      ((unsigned int) 0x00000004)#define SSP_CR1_SOD     ((unsigned int) 0x00000008)#define SSP_SR_TFE      ((unsigned int) 0x00000001)#define SSP_SR_TNF      ((unsigned int) 0x00000002)#define SSP_SR_RNE      ((unsigned int) 0x00000004)#define SSP_SR_RFF      ((unsigned int) 0x00000008)#define SSP_SR_BSY      ((unsigned int) 0x00000010)#define SSP_IMSC_RORIM  ((unsigned int) 0x00000001)#define SSP_IMSC_RTIM   ((unsigned int) 0x00000002)#define SSP_IMSC_RXIM   ((unsigned int) 0x00000004)#define SSP_IMSC_TXIM   ((unsigned int) 0x00000008)#define SSP_RIS_RORRIS  ((unsigned int) 0x00000001)#define SSP_RIS_RTRIS   ((unsigned int) 0x00000002)#define SSP_RIS_RXRIS   ((unsigned int) 0x00000004)#define SSP_RIS_TXRIS   ((unsigned int) 0x00000008)#define SSP_MIS_RORMIS  ((unsigned int) 0x00000001)#define SSP_MIS_RTMIS   ((unsigned int) 0x00000002)#define SSP_MIS_RXMIS   ((unsigned int) 0x00000004)#define SSP_MIS_TXMIS   ((unsigned int) 0x00000008)#define SSP_ICR_RORIC   ((unsigned int) 0x00000001)#define SSP_ICR_RTIC    ((unsigned int) 0x00000002)/*################################################################################ Timer 0 and Timer 1##############################################################################*/#define T0_BASE_ADDR        (pREG32 (0xe0004000))#define T0_IR               (*(pREG32 (0xe0004000)))#define T0_TCR              (*(pREG32 (0xe0004004)))#define T0_TC               (*(pREG32 (0xe0004008)))#define T0_PR               (*(pREG32 (0xe000400c)))#define T0_PC               (*(pREG32 (0xe0004010)))#define T0_MCR              (*(pREG32 (0xe0004014)))#define T0_MR0              (*(pREG32 (0xe0004018)))#define T0_MR1              (*(pREG32 (0xe000401c)))#define T0_MR2              (*(pREG32 (0xe0004020)))#define T0_MR3              (*(pREG32 (0xe0004024)))#define T0_CCR              (*(pREG32 (0xe0004028)))#define T0_CR0              (*(pREG32 (0xe000402c)))#define T0_CR1              (*(pREG32 (0xe0004030)))#define T0_CR2              (*(pREG32 (0xe0004034)))#define T0_CR3              (*(pREG32 (0xe0004038)))#define T0_EMR              (*(pREG32 (0xe000403c)))#define T0_CTCR             (*(pREG32 (0xe0004070)))#define T1_BASE_ADDR        (pREG32 (0xe0008000))#define T1_IR               (*(pREG32 (0xe0008000)))#define T1_TCR              (*(pREG32 (0xe0008004)))#define T1_TC               (*(pREG32 (0xe0008008)))#define T1_PR               (*(pREG32 (0xe000800c)))#define T1_PC               (*(pREG32 (0xe0008010)))#define T1_MCR              (*(pREG32 (0xe0008014)))#define T1_MR0              (*(pREG32 (0xe0008018)))#define T1_MR1              (*(pREG32 (0xe000801c)))#define T1_MR2              (*(pREG32 (0xe0008020)))#define T1_MR3              (*(pREG32 (0xe0008024)))#define T1_CCR              (*(pREG32 (0xe0008028)))#define T1_CR0              (*(pREG32 (0xe000802c)))#define T1_CR1              (*(pREG32 (0xe0008030)))#define T1_CR2              (*(pREG32 (0xe0008034)))#define T1_CR3              (*(pREG32 (0xe0008038)))#define T1_EMR              (*(pREG32 (0xe000803c)))#define T1_CTCR             (*(pREG32 (0xe0008070)))#define T_IR_MR0            (0x00000001)#define T_IR_MR1            (0x00000002)#define T_IR_MR2            (0x00000004)#define T_IR_MR3            (0x00000008)#define T_IR_CR0            (0x00000010)#define T_IR_CR1            (0x00000020)#define T_IR_CR2            (0x00000040)#define T_IR_CR3            (0x00000080)#define T_IR_MASK           (0x000000ff)#define T_TCR_CE            (0x00000001)#define T_TCR_CR            (0x00000002)#define T_CTCR_MODE_PCLK    (0x00000000)#define T_CTCR_MODE_CAPRISE (0x00000001)#define T_CTCR_MODE_CAPFALL (0x00000002)#define T_CTCR_MODE_CAPBOTH (0x00000003)#define T_CTCR_MODE_MASK    (0x00000003)#define T_CTCR_CIS_CAPN0    (0x00000000)#define T_CTCR_CIS_CAPN1    (0x00000004)#define T_CTCR_CIS_CAPN2    (0x00000008)#define T_CTCR_CIS_CAPN3    (0x0000000c)#define T_CTCR_CIS_MASK     (0x0000000c)