--lpm_divide DEVICE_FAMILY="Cyclone" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=7 LPM_WIDTHN=7 OPTIMIZE_FOR_SPEED=5 denom numer remain CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF"
--VERSION_BEGIN 8.0 cbx_cycloneii 2008:02:23:252825 cbx_lpm_abs 2008:02:23:252825 cbx_lpm_add_sub 2008:03:09:257947 cbx_lpm_divide 2008:03:31:268907 cbx_mgl 2008:04:11:273944 cbx_stratix 2008:02:23:252825 cbx_stratixii 2008:02:23:252825 cbx_util_mgl 2008:04:15:275689  VERSION_END


-- Copyright (C) 1991-2008 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION sign_div_unsign_dkh (denominator[6..0], numerator[6..0])
RETURNS ( quotient[6..0], remainder[6..0]);

--synthesis_resources = 
SUBDESIGN lpm_divide_ktl
( 
	denom[6..0]	:	input;
	numer[6..0]	:	input;
	quotient[6..0]	:	output;
	remain[6..0]	:	output;
) 
VARIABLE 
	divider : sign_div_unsign_dkh;
	numer_tmp[6..0]	: WIRE;

BEGIN 
	divider.denominator[] = denom[];
	divider.numerator[] = numer_tmp[];
	numer_tmp[] = numer[];
	quotient[] = divider.quotient[];
	remain[] = divider.remainder[];
END;
--VALID FILE