[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
ptn_Child3=Document-2
ptn_Child4=Document-3
ptn_Child5=Document-4
[ProjectWorkspace.Frames.ChildFrames.Document-0]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
DocPathName=vga_dis.v
DocumentCLSID={84678d98-dc76-11d0-a0d8-0020affa5bde}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPDOPPPPPPAAAAAAAAAAAAAAAAAKCAAAAAGEBAAAAA
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0.StateMap]
AFC_IN_REPORT=False
[ProjectWorkspace.Frames.ChildFrames.Document-3]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-3.ViewFrame-0]
DocPathName=c:/altera/70/quartus/bin/pin_planner.ppl
DocumentCLSID={428be327-2a68-4a16-a2c9-0502a8811afc}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPDOPPPPPPMCAAAAAAIDAAAAAAANCAAAAACIBAAAAA
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-3.ViewFrame-0.StateMap]
AFC_CMP_AP_NAME=vga_dis
AFC_PROJ_DB_PATH=E:/個人項目/BJ-EPM240學習板/實驗板刻盤資料/實驗例程以及說明文檔/7、VGA接口實驗/verilogvga/db/vga_dis.quartus_db
AFC_IN_REPORT=False