亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

? 歡迎來到蟲蟲下載站! | ?? 資源下載 ?? 資源專輯 ?? 關于我們
? 蟲蟲下載站

?? cpu.vhd

?? 8051 mega core porocesssor vhdl source code
?? VHD
?? 第 1 頁 / 共 4 頁
字號:
                  CJNE_IR1_N   | CJNE_R0_N   |
                  CJNE_R1_N    | CJNE_R2_N   |
                  CJNE_R3_N    | CJNE_R4_N   |
                  CJNE_R5_N    | CJNE_R6_N   |
                  CJNE_R7_N    | DJNZ_ADDR   |
                  LCALL
                  =>
                  if curcycle=1 or curcycle=2 then
                     pc_inc_e <= '1';
                  else
                     pc_inc_e <= '0';
                  end if;
                  
                  when others => -- instrreg
                     if curcycle=1 or curcycle=3 then
                        pc_inc_e <= '1';
                     else
                        pc_inc_e <= '0';
                     end if;
               end case;
               
               when others => -- nr bytes
                  pc_inc_e <= '0';
            end case;
         else
            pc_inc_e <= '0';
         end if; -- phase=4
      end process;
               
            
   --------------------------------------------------------------------
   -- Program Counter increment enable - registered section
   --------------------------------------------------------------------
   pcince_write_proc:
   --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
            -------------------------------------
            -- Synchronous reset
            -------------------------------------
            if rst='1' then
               pcince <= '0';
            else
            -------------------------------------
            -- Synchronous write
            -------------------------------------
               if (  (  (debugprog='0' and debugprogff='0'
                        ) and
                        (debugreq='1' or debugmode='1'
                        ) and 
                        (debugstepff='1' or debugstep='1' 
                        )
                     ) or -- debugger mode, user program  
                     (debugmode='0' and not(curcycle=nr_cycles)
                     ) or
                     (debugreq='0' and debugmode='0'
                     ) 
                  ) and
                  (  (  (curcycle=nr_cycles and
                         curphase=4) and             -- codefetche 
                      intreq='0'
                     ) or
                      pc_inc_e = '1'                 -- datafetche
                  ) and int_call='0'
               then
                  pcince <= '1';
               else
                  pcince <= '0';
               end if;
            end if;
         end if;
      end process;
      
      
   --------------------------------------------------------------------
   -- Instruction Register
   --------------------------------------------------------------------
   instrreg_proc:
   --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
            -------------------------------------
            -- Synchronous reset
            -------------------------------------
            if rst='1' then
               instrreg <= NOP;
            else
            -------------------------------------
            -- Synchronous write
            -------------------------------------
               -- Instruction register write
               ----------------------------------
               if codefetche_ff='1' then
                  if debugmode='1' and debugstep='0' and debugstepff='0' then
                     instrreg <= NOP;
                  elsif intreq='1' then  -- Interrupt request
                     instrreg <= LCALL;
                  else
                     if memdatai=UNKNOWN then
                        instrreg <= NOP;
                     else
                        instrreg <= memdatai;
                     end if;
                  end if;
               end if;
            end if;
         end if;
      end process;
   
   
   --------------------------------------------------------------------
   -- Current machine cycle counter
   --------------------------------------------------------------------
   curcycle_proc:
   --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
            -------------------------------------
            -- Synchronous reset
            -------------------------------------
            if rst='1' and par_cycle='0' then
               curcycle <= 1;
            else
            -------------------------------------
            -- Synchronous write
            -------------------------------------
               -- Current cycle count
               ----------------------------------
               if (curphase=6) then
                  if (curcycle<nr_cycles)  then
                     curcycle <= curcycle + 1;
                  else
                     curcycle <= 1;
                  end if;
               end if;
            end if;
         end if;
      end process;
   
     
   --------------------------------------------------------------------
   -- Current phase of cycle
   --------------------------------------------------------------------
   curphase_proc:
   --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
         -------------------------------------
         -- Synchronous reset
         -------------------------------------

         -------------------------------------
         -- Synchronous write
         -------------------------------------
            -- Current phase count
            ----------------------------------
            case curphase is
               when 1 =>
                  curphase <= 2;
               when 2 =>
                  curphase <= 3;
               when 3 =>
                  curphase <= 4;
               when 4 =>
                  curphase <= 5;
               when 5 =>
                  curphase <= 6;
               when others =>
                  curphase <= 1;
            end case;
         end if;
      end process;
   
   --------------------------------------------------------------------
   -- Parity cycle indicator
   --------------------------------------------------------------------
   par_cycle_proc:
   --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
         -------------------------------------
         -- Synchronous reset
         -------------------------------------

         -------------------------------------
         -- Synchronous write
         -------------------------------------
            if curphase = 6 then
               if par_cycle= '0' then
                  par_cycle <= '1';
               else
                  par_cycle <= '0';
               end if;
            end if;
         end if;
      end process;
   
   --------------------------------------------------------------------
   -- Read-Modify-Write instructions
   --------------------------------------------------------------------
   rmwinstr_decoder_hand:
   --------------------------------------------------------------------
      rmwinstr_a <=
         '1' when (memdatai=ANL_ADDR_A or
                   memdatai=ANL_ADDR_N or
                   memdatai=ORL_ADDR_A or
                   memdatai=ORL_ADDR_N or
                   memdatai=XRL_ADDR_A or
                   memdatai=XRL_ADDR_N or
                   memdatai=JBC_BIT    or
                   memdatai=CPL_BIT    or
                   memdatai=INC_ADDR   or
                   memdatai=DEC_ADDR   or
                   memdatai=DJNZ_ADDR  or
                   memdatai=MOV_BIT_C  or
                   memdatai=CLR_BIT    or
                   memdatai=SETB_BIT
                  ) else
         '0';
   
         
   --------------------------------------------------------------------
   -- Read-Modify-Write instructions flip-flop
   --------------------------------------------------------------------
   rmwinstr_decoder_proc:
   -------------------------------------------------------------------- 
      process (clk)
      begin
         if (clk'event and clk='1') then
            -------------------------------------
            -- Synchronous reset
            -------------------------------------
            if rst='1' then
               rmwinstr <= '0';
            else
            -------------------------------------
            -- Synchronous write
            -------------------------------------
               -- Read-Modify-Write flip-flop
               ----------------------------------
               if codefetche_ff='1' then --or debugfetche_ff='1' then
                  rmwinstr <= rmwinstr_a;
               end if;
            end if;
         end if;
      end process;   
   
   
   --------------------------------------------------------------------
   nr_decoder_hand:
   -------------------------------------------------------------------- 
      process (memdatai)
      begin
         case memdatai is
            -------------------------------------
            -- 00h
            -------------------------------------
            when NOP        =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when AJMP_0     =>     
               nr_bytes_a  <= 2;
               nr_cycles_a <= 4;
            when LJMP       =>    
               nr_bytes_a  <= 3;
               nr_cycles_a <= 4;
            when RR_A       =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_A      =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_ADDR   =>    
               nr_bytes_a  <= 2;
               nr_cycles_a <= 2;
            when INC_IR0    =>    
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_IR1    =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R0     =>    
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R1     =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R2     =>    
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R3     =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R4     =>    
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R5     =>    
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R6     =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when INC_R7     =>     
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
         
            -------------------------------------
            -- 10h
            -------------------------------------
            when JBC_BIT    =>
               nr_bytes_a  <= 3;
               nr_cycles_a <= 4;
            when ACALL_0    =>
               nr_bytes_a  <= 2;
               nr_cycles_a <= 4;
            when LCALL      =>
               nr_bytes_a  <= 3;
               nr_cycles_a <= 4;
            when RRC_A      =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_A      =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_ADDR   =>
               nr_bytes_a  <= 2;
               nr_cycles_a <= 2;
            when DEC_IR0    =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_IR1    =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R0     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R1     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R2     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R3     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R4     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R5     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R6     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when DEC_R7     =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
         
            -------------------------------------
            -- 20h
            -------------------------------------
            when JB_BIT     =>
               nr_bytes_a  <= 3;
               nr_cycles_a <= 4;
            when AJMP_1     =>        
               nr_bytes_a  <= 2;
               nr_cycles_a <= 4;
            when RET        =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 4;
            when RL_A       =>
               nr_bytes_a  <= 1;
               nr_cycles_a <= 2;
            when ADD_N      =>
               nr_bytes_a  <= 2;
               nr_cycles_a <= 2;
            when ADD_ADDR   =>

?? 快捷鍵說明

復制代碼 Ctrl + C
搜索代碼 Ctrl + F
全屏模式 F11
切換主題 Ctrl + Shift + D
顯示快捷鍵 ?
增大字號 Ctrl + =
減小字號 Ctrl + -
亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
91国偷自产一区二区开放时间| 蜜臀精品久久久久久蜜臀 | 日韩国产欧美在线播放| 欧美日韩精品高清| 免费看日韩精品| 欧美大度的电影原声| 国产成人午夜视频| 国产精品高潮呻吟| 欧美在线播放高清精品| 日日欢夜夜爽一区| 久久久欧美精品sm网站| 97精品国产露脸对白| 一区二区国产盗摄色噜噜| 欧美一区二区大片| 国产成人在线影院| 亚洲va欧美va国产va天堂影院| 欧美一区二区在线视频| 国产高清不卡一区二区| 亚洲美女淫视频| 精品三级在线看| 91女神在线视频| 免费成人在线网站| 中文字幕一区二区三| 69堂精品视频| 成人免费毛片a| 视频在线观看国产精品| 欧美激情一区二区三区全黄| 欧美在线不卡视频| 国产成人啪午夜精品网站男同| 亚洲精品乱码久久久久久日本蜜臀| 欧美日韩一区二区三区在线| 国产精品综合在线视频| 亚洲国产综合在线| 欧美国产一区视频在线观看| 精品视频一区二区三区免费| 丰满白嫩尤物一区二区| 视频一区欧美精品| 亚洲天堂2016| 久久久夜色精品亚洲| 欧洲中文字幕精品| av在线播放成人| 九九热在线视频观看这里只有精品| 最新不卡av在线| 久久婷婷久久一区二区三区| 欧美视频在线一区二区三区 | 日韩一区欧美二区| 亚洲欧美另类久久久精品 | 国产精品国产三级国产普通话99 | 欧美国产日产图区| 欧美大片在线观看| 欧美日韩不卡视频| 成人av免费网站| 韩国三级在线一区| 三级亚洲高清视频| 亚洲一区二区四区蜜桃| 国产精品嫩草影院com| 日韩一卡二卡三卡国产欧美| 色综合夜色一区| 精品一区二区三区久久久| 亚洲激情自拍视频| 国产精品电影一区二区| 久久影音资源网| 精品剧情在线观看| 日韩女优av电影在线观看| 欧美久久久久久久久中文字幕| 91麻豆自制传媒国产之光| 成人精品鲁一区一区二区| 国产精品一二三四区| 久草精品在线观看| 久99久精品视频免费观看| 免费人成在线不卡| 美女一区二区视频| 免费在线观看一区二区三区| 日本不卡高清视频| 美女一区二区久久| 经典三级一区二区| 国产精品资源在线看| 国产一区二区三区av电影| 国产曰批免费观看久久久| 狂野欧美性猛交blacked| 麻豆精品一区二区av白丝在线| 免费不卡在线视频| 韩国成人福利片在线播放| 激情综合网av| 高清国产一区二区三区| 成人动漫在线一区| 91麻豆产精品久久久久久 | 欧美另类变人与禽xxxxx| 在线播放欧美女士性生活| 91精品国产高清一区二区三区蜜臀 | 五月开心婷婷久久| 日韩在线一区二区| 国内成+人亚洲+欧美+综合在线| 精品一区精品二区高清| 成人精品一区二区三区四区| 92国产精品观看| 欧美精品777| 久久久久99精品一区| 1000精品久久久久久久久| 伊人一区二区三区| 美国十次综合导航| 懂色av中文一区二区三区| 91丝袜美腿高跟国产极品老师 | 精品国产伦一区二区三区免费| 久久网站热最新地址| 亚洲精品成a人| 久久精品免费看| 粉嫩一区二区三区在线看| 91精品办公室少妇高潮对白| 欧美一二区视频| 国产精品免费观看视频| 亚洲成a人片在线不卡一二三区| 久久精品国产一区二区三区免费看| 国产福利电影一区二区三区| 色哦色哦哦色天天综合| 日韩欧美国产精品一区| 国产精品美女久久久久久2018| 亚洲国产精品久久人人爱| 国产美女在线精品| 欧美网站大全在线观看| 久久精品一区二区| 亚洲成人在线观看视频| 成人一级片网址| 欧美一级淫片007| 中文字幕亚洲一区二区va在线| 奇米精品一区二区三区在线观看 | 色婷婷激情一区二区三区| 538在线一区二区精品国产| 国产女人18毛片水真多成人如厕| 午夜天堂影视香蕉久久| 国产99精品国产| 日韩免费一区二区三区在线播放| 自拍偷拍国产亚洲| 国产精品一级黄| 日韩你懂的电影在线观看| 亚洲国产成人高清精品| 成人午夜免费视频| 久久麻豆一区二区| 蜜桃传媒麻豆第一区在线观看| 91福利国产成人精品照片| 国产蜜臀97一区二区三区| 免费成人美女在线观看| 欧美日韩亚洲综合在线| 亚洲欧美区自拍先锋| eeuss国产一区二区三区| 精品国产青草久久久久福利| 婷婷国产在线综合| 日本久久电影网| 亚洲三级在线观看| 成人av动漫在线| 欧美激情综合五月色丁香小说| 精品综合免费视频观看| 欧美日韩国产片| 亚洲成a人v欧美综合天堂| 91国偷自产一区二区三区成为亚洲经典 | 亚洲图片欧美一区| 在线精品视频免费观看| 亚洲视频免费在线观看| 91丝袜高跟美女视频| 1024成人网色www| 色综合天天综合给合国产| 自拍偷自拍亚洲精品播放| 成人高清av在线| 亚洲欧洲美洲综合色网| www.亚洲激情.com| 亚洲欧洲精品一区二区三区| 99精品久久久久久| 亚洲人成精品久久久久| 91成人网在线| 亚洲va中文字幕| 欧美一区二区三区人| 久久99精品久久只有精品| 久久久久国产精品免费免费搜索| 国产精品一区二区你懂的| 日本一区二区在线不卡| 粉嫩aⅴ一区二区三区四区| 亚洲欧洲av在线| 色哟哟国产精品| 亚洲v日本v欧美v久久精品| 日韩一区二区在线观看| 国内欧美视频一区二区| 国产亚洲综合在线| 不卡的av电影在线观看| 一区二区成人在线观看| 91麻豆精品国产综合久久久久久| 美女一区二区久久| 国产精品久久久久一区 | 伦理电影国产精品| 国产日韩欧美高清| 99re成人精品视频| 日韩在线观看一区二区| 久久久久久久电影| 色偷偷88欧美精品久久久| 日韩国产在线观看| 日本一二三四高清不卡| 在线视频国产一区| 久久成人免费网| 亚洲欧美激情小说另类| 日韩午夜激情电影| 不卡的电影网站|