.title  "Flash bootup utility for 6211 dsk"
       
; EMIF registers and values   
EMIF_GCR 	  .equ    0x01800000  ;EMIF global control     
EMIF_CE1      .equ    0x01800004  ;address of EMIF CE1 control reg. 
EMIF_CE0      .equ    0x01800008  ;EMIF CE0control          
EMIF_SDCTRL   .equ    0x01800018  ;EMIF SDRAM control     
EMIF_SDRP     .equ    0x0180001c  ;EMIF SDRM refresh period 
EMIF_CE1_8    .equ    0xffffff03  ;
EMIF_CE0_V    .equ    0xc0ffff30  ;EMIF CE0control   ;0x30
EMIF_SDCTRL_V .equ    0x07117000  ;EMIF SDRAM control ;0x73380000    

; QDMA registers and values
QDMA_OPT	  .equ	  0x02000000  ;QDMA options register
QDMA_OPT_VAL  .equ	  0x21200001  ;QDMA options
QDMA_SRC	  .equ	  0x02000004  ;QDMA source address register
QDMA_CNT	  .equ	  0x02000008  ;QDMA count register
QDMA_DST	  .equ	  0x0200000c  ;QDMA destination address register
QDMA_S_IDX	  .equ	  0x02000030  ;QDMA index pseudo-register

 
 .sect ".boot_load" 
 .global _boot
 .ref _c_int00
 
 
_boot:             
                                           
; **************       
; Configure EMIF                
; **************
                            
            mvkl  EMIF_GCR,A4    ;EMIF_GCR address ->A4
      ||    mvkl  0x3300,B4      

            mvkh  EMIF_GCR,A4
      ||    mvkh  0x3300,B4  
                            
            stw   B4,*A4             

            mvkl  EMIF_CE0,A4       ;EMIF_CE0 address ->A4
      ||    mvkl  EMIF_CE0_V,B4     ;

            mvkh  EMIF_CE0,A4
      ||    mvkh  EMIF_CE0_V,B4
      
            stw   B4,*A4

            mvkl  EMIF_CE1,A4       ;EMIF_CE1 address ->A4
      ||    mvkl  EMIF_CE1_8,B4     ;

            mvkh  EMIF_CE1,A4
      ||    mvkh  EMIF_CE1_8,B4
      
            stw   B4,*A4
    
      ||    mvkl  EMIF_SDCTRL,A4    ;EMIF_SDCTRL address ->A4
      ||    mvkl  EMIF_SDCTRL_V,B4     ;

            mvkh  EMIF_SDCTRL,A4
      ||    mvkh  EMIF_SDCTRL_V,B4     
      
            stw   B4,*A4                
      ||    mvkl  EMIF_SDRP,A4      ;EMIF_SDRP address ->A4
      ||    mvkl  0x61a,B4    ;

            mvkh  EMIF_SDRP,A4
      ||    mvkh  0x61a,B4
            
            stw   B4,*A4   


; *************            
; Copy Sections
; *************


	    	mvkl  copyTable, a3	; load table pointer
	    	mvkh  copyTable, a3
	    	
copy_section_top:	
	    	ldw   *a3++, b0 ; byte count
	    	ldw   *a3++, a4	; load ram start address
	    	ldw   *a3++, b4	; load flash start address
	    	nop   2
	[!b0]   b copy_done		; have we copied all sections? 
	    	nop 5
	    	
; copy this section with QDMA

			mvkl  QDMA_OPT,A5	; set QDMA options
 	||		mvkl  QDMA_OPT_VAL,B5      
 			mvkh  QDMA_OPT,A5
 	||		mvkh  QDMA_OPT_VAL,B5
 			stw   B5,*A5
 			mvkl  QDMA_SRC,A5	; load source address
 			mvkh  QDMA_SRC,A5      
 			stw   B4,*A5	        
			shr   B0,2,B1      	; divide size by 4 (because we're in 32-bit mode)
			mvkl  QDMA_CNT,A5 	; load word count
			mvkh  QDMA_CNT,A5      
 			stw   B1,*A5            
 			mvkl  QDMA_DST,A5	; load destination address
 			mvkh  QDMA_DST,A5      
 			stw   A4,*A5	  
			mvkl  QDMA_S_IDX,A5 ; set index. writing to this register will
 			mvkh  QDMA_S_IDX,A5 ; also initiate the transfer.
 			zero  B5
 			stw   B5,*A5        ; go!

; next section	           

			b	  copy_section_top
			nop   5

copy_done:  ; done with section copying.  
			; jump to _c_int00
			
			mvkl .S2 _c_int00, B0
            mvkh .S2 _c_int00, B0
            B    .S2 B0
            nop   5
               
               
; *************            
; Section Table
; *************
               
               
    ;; Table of sections to copy. Format is:
    ;; word 0:	byte count
    ;; word 1:	run address
    ;; word 2:	load address
    
   .ref textSize,   textRun ; these symbols created with
   .ref biosSize,   biosRun ; linker command file
   .ref trcinitSize,trcinitRun
   .ref hwi_vecRun
   
copyTable:       
    ;; .text
    .word (textSize)
    .word (textRun)
    .word 0x90001a20   
    ;; .bios
    .word (biosSize)
    .word (biosRun)
    .word 0x900055e0
    ;; .hwi_vec
    .word 0x200 ; hwi_vec is 0x200 bytes
    .word (hwi_vecRun)
    .word 0x90001820
    ;; .trcinit
    .word (trcinitSize)
    .word (trcinitRun)
    .word 0x90001448
    ;; end of table
    .word 0
    .word 0
    .word 0