?? board.c
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/* * vendors/Motorola/M5249C3-1MB/board.c * CoLiLo MCF5249 Development board port * * (C) Copyright April 2003, Jeremy Andrus <jeremy@jeremya.com> * */#include "arch.h"#include "mcfuart.h"#include "ledstate.h"char ident[] = "Motorola MCF5249 C3";char copyright[] = "(C) 2003, Jeremy Andrus <jeremy@jeremya.com>";extern unsigned int downloadPort;extern unsigned int image_size;extern unsigned char *xfer_addr;extern unsigned char *down_addr;extern unsigned char *dest_addr;extern unsigned char *source_addr;extern unsigned long consoleBase;void configureConsole();void configureAuxSerial();void setLED(int state);void setImageParams();void setupBoard();static int delay(int size);void setupDRAM();#define IMAGE_ADDR 0xfff08000 /* colilo shouldn't be more than 32k */#define IMAGE_SIZE 0x000f7fff /* You really can't get any bigger than 1MB - 32 k :-) */#define XFER_ADDR 0x20000#define DEFAULT_PORT 1void configureConsole(){ /** Note: The UART timer in the 5249 uses the bus clock (PSTCLK / 2) to generate the baud ***/ consoleBase = MCFUART_BASE1; configureSerial(MCFUART_BASE1, 19200, MCF_BUSCLK); /* dBUG compliance: 19200 it is. */}void configureAuxSerial(){ configureSerial(MCFUART_BASE2, 115200, MCF_BUSCLK); /* This can be used for image transfers */}/* * State to LED mapping: * The gpio pins 53,52,51,34,19,18,12,11,9 will serve as a nice boot-up state indicator * */void setLED(int state){ /* Note: LEDs asserted low */ /* M5249C3 Diode Layout * * gpio | led | diode * 19 | 0 | 13 * 18 | 1 | 14 * 34 | 2 | 15 * 11 | 3 | 16 * ------------------ * 12 | 4 | 17 * 9 | 5 | 18 * 53 | 6 | 19 * ------------------ * 52 | 7 | 20 * 51 | 8 | 21 * ------------------ * */ /* bits = gpio[31..0], bits1 = gpio[63..32] */ unsigned long bits, bits1; /* boot (led[3..0]) indicates the major boot step */ switch(state) { case LED_STATUS_INIT: bits = 0xffffffff; bits1 = 0xffffffff; break; case LED_STATUS_MEM: bits = 0xfff7ffff; bits1 = 0xffffffff; break; case LED_STATUS_RUNTIME: bits = 0xfffbffff; bits1 = 0xffffffff; break; case LED_STATUS_UART: bits = 0xfff3ffff; bits1 = 0xffffffff; break; case LED_STATUS_UI: bits = 0xffffffff; bits1 = 0xfffffffb; break; case LED_STATUS_DLOAD: bits = 0xfff7ffff; bits1 = 0xfffffffb; break; case LED_STATUS_DDECOMPGO: case LED_STATUS_DDECOMPRESS: bits = 0xfffbffff; bits1 = 0xfffffffb; break; case LED_STATUS_RUNIMAGE: bits = 0xfff3ffff; bits1 = 0xfffffffb; break; /* * This is a binary counter, so if we ever need more states * they're right here :-) ~Jeremy */ /********************** case 8: bits = 0xfffff7ff; bits1 = 0xffffffff; break; case 9: bits = 0xfff7f7ff; bits1 = 0xffffffff; break; case 10: bits = 0xfffbf7ff; bits1 = 0xffffffff; break; case 11: bits = 0xfff3f7ff; bits1 = 0xffffffff; break; case 12: bits = 0xfffff7ff; bits1 = 0xfffffffb; break; case 13: bits = 0xfff7f7ff; bits1 = 0xfffffffb; break; case 14: bits = 0xfffbf7ff; bits1 = 0xfffffffb; break; ***********************/ case LED_STATUS_ERROR: bits = 0xfff3f7ff; bits1 = 0xfffffffb; break; default: bits = 0xffffffff; bits1 = 0xffffffff; break; } switch (state) { case LED_STATUS_MEMPRECHARGE: case LED_STATUS_CS6: case LED_STATUS_COPYDATA: bits ^= 0x00001000; bits1 ^= 0x00000000; break; case LED_STATUS_MEMREFRESH: case LED_STATUS_CS5: case LED_STATUS_ZEROBSS: bits ^= 0x00000200; bits1 ^= 0x00000000; break; case LED_STATUS_MEMMRI: case LED_STATUS_CS4: case LED_STATUS_INITVEC: bits ^= 0x00001200; bits1 ^= 0x00000000; break; case LED_STATUS_CS3: case LED_STATUS_DECOMP1: bits ^= 0x00000000; bits1 ^= 0x00200000; break; case LED_STATUS_CS2: case LED_STATUS_DECOMP2: bits ^= 0x00001000; bits1 ^= 0x00200000; break; case LED_STATUS_CS1: case LED_STATUS_LOAD1: bits ^= 0x00000200; bits1 ^= 0x00200000; break; case LED_STATUS_CS0: case LED_STATUS_LOAD2: bits ^= 0x00001200; bits1 ^= 0x00200000; break; default: bits ^= 0x00000000; bits1 ^= 0x00000000; break; } switch (state) { case LED_STATUS_ENSWT: bits1 ^= 0x00100000; break; case LED_STATUS_STARTIMG: bits1 ^= 0x00080000; break; /** Kept this here to keep the binary counter case 3: bits1 ^= 0x00180000; break; **/ default: bits1 ^= 0x00000000; break; } mbar2_writeLong(MCFSIM_GPIO_OUT, bits); // Write the new LED config to the gpio pins mbar2_writeLong(MCFSIM_GPIO1_OUT, bits1);}void setImageParams(){ downloadPort = DEFAULT_PORT; image_size = IMAGE_SIZE; source_addr = (unsigned char *)IMAGE_ADDR; down_addr = (unsigned char *)IMAGE_ADDR; xfer_addr = (unsigned char *)XFER_ADDR; dest_addr = (unsigned char *)XFER_ADDR;}void setupBoard(){ /* * Setup the PLL to run at the specified speed * */ volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR); // Current PLL value unsigned long pllcr;#ifdef __MCF_FAST_CLK__ pllcr = 0x925a3100; // ~140MHz clock (PLL bypass = 0)#else pllcr = 0x135a4140; // ~72MHz clock (PLL bypass = 0)#endif cpll = cpll & 0xfffffffe; // Set PLL bypass mode = 0 (PSTCLK = crystal) mbar2_writeLong(MCFSIM_PLLCR, cpll); // Set the PLL to bypass mode (PSTCLK = crystal) mbar2_writeLong(MCFSIM_PLLCR, pllcr); // set the clock speed pllcr ^= 0x00000001; // Set pll bypass to 1 mbar2_writeLong(MCFSIM_PLLCR, pllcr); // Start locking (pll bypass = 1) delay(0x20); // Wait for a lock . . . /* * Turn off the two LEDs that are on by default: D18, D19 * We will start flashing LEDs in just a minute ;-) * These are on GPIO pins on the 5349C3 board * * NOTE: by setting the GPIO_FUNCTION registers, we ensure that the UART pins * (UART0: gpio 30,27, UART1: gpio 31, 28) will be used as UART pins * which is their primary function. * ~Jeremy */ mbar2_writeLong(MCFSIM_GPIO_FUNC, 0x000C1A00); // Enable gpio pins: 19,18,112,11,9 (LEDs) mbar2_writeLong(MCFSIM_GPIO1_FUNC, 0x00380004); // Enable gpio pins: 53,52,51,34 (LEDs) mbar2_writeLong(MCFSIM_GPIO_EN, 0x000C1A00); // Map the pins to the corresponding gpio mbar2_writeLong(MCFSIM_GPIO1_EN, 0x00380004); setLED(LED_STATUS_INIT); // Actualy clear the LEDs: Starting up . . . /* * dBug Compliance: * You can verify these values by using dBug's 'ird' * (Internal Register Display) command * ~Jeremy * */ mbar_writeByte(MCFSIM_MPARK, 0x30); // 5249 Internal Core takes priority over DMA mbar_writeByte(MCFSIM_SYPCR, 0x00); mbar_writeByte(MCFSIM_SWIVR, 0x0f); mbar_writeByte(MCFSIM_SWSR, 0x00); mbar_writeLong(MCFSIM_IMR, 0xfffffbff); mbar_writeByte(MCFSIM_SWDICR, 0x00); mbar_writeByte(MCFSIM_TIMER1ICR, 0x00); mbar_writeByte(MCFSIM_TIMER2ICR, 0x88); mbar_writeByte(MCFSIM_I2CICR, 0x00); mbar_writeByte(MCFSIM_UART1ICR, 0x00); mbar_writeByte(MCFSIM_UART2ICR, 0x00); mbar_writeByte(MCFSIM_ICR6, 0x00); mbar_writeByte(MCFSIM_ICR7, 0x00); mbar_writeByte(MCFSIM_ICR8, 0x00); mbar_writeByte(MCFSIM_ICR9, 0x00); mbar_writeByte(MCFSIM_QSPIICR, 0x00); mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080); mbar2_writeByte(MCFSIM_INTBASE, 0x40); // Base interrupts at 64 mbar2_writeByte(MCFSIM_SPURVEC, 0x00); mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); // Enable a 1 cycle pre-drive cycle on CS1 /* Setup interrupt priorities for gpio7 */ // mbar2_writeLong(MCFSIM_INTLEV5, 0x70000000); /* IDE Config registers */ mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); mbar2_writeLong(MCFSIM_IDECONFIG2, 0x00000000); /* * Setup chip selects... */ setLED(LED_STATUS_CS3); /* CS3 - IDE interface */ mbar_writeShort(MCFSIM_CSAR3, 0x0202); mbar_writeShort(MCFSIM_CSCR3, 0x34b8); mbar_writeLong(MCFSIM_CSMR3, 0xbdb4017a); setLED(LED_STATUS_CS2); /* CS2 - IDE interface */ mbar_writeShort(MCFSIM_CSAR2, 0x5000); mbar_writeShort(MCFSIM_CSCR2, 0x0080); mbar_writeLong(MCFSIM_CSMR2, 0x001f0000); setLED(LED_STATUS_CS1); /* CS1 - SMSC LAN91C111 ethernet, address 0xe0000000 */ mbar_writeShort(MCFSIM_CSAR1,0xe000); mbar_writeShort(MCFSIM_CSCR1, 0x0080); // WS=0100 (4 wait states), AA=1, PS=10 (16bit port) mbar_writeLong(MCFSIM_CSMR1, 0x00000021); // , AA=0, WP=0, C/I=1, V=1 setLED(LED_STATUS_CS0); /* CS0 - AMD Flash */ mbar_writeShort(MCFSIM_CSAR0,0xfff0); mbar_writeShort(MCFSIM_CSCR0, 0x1180); // WS=0100 (4 wait states), AA=1, PS=10 (16bit port) /** Note: There is a CSMR0/DRAM vector problem, need to disable C/I ***/ mbar_writeLong(MCFSIM_CSMR0, 0x000f0021); // 1MB of flash (the bottom half), WP=0, C/I=1, V=1}static int delay(int size){ int i; for (i = 0; (i < size); i++) nop();}/* * SDRAM is pretty confusing. * Please read _all_ the docs before meddling with this code :-) * ~Jeremy */void setupDRAM(){ volatile unsigned char *mbar = (unsigned char *)MCF_MBAR; unsigned long junk = 0xa5a59696; /* * Note: * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1 */#ifdef __MCF_FAST_CLK__ // Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K) // SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39 mbar_writeShort(MCFSIM_DCR, 0x8239); #else // Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K) // SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles) mbar_writeShort(MCFSIM_DCR, 0x8222); #endif // SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port), PM=1 (continuous page mode) // RE=0 (keep auto-refresh disabled while setting up registers) mbar_writeLong(MCFSIM_DACR0, 0x00003224); // BAM=007c (bits 22,21 are bank selects; 256kB blocks) mbar_writeLong(MCFSIM_DMR0, 0x007c0001); /** Precharge sequence **/ mbar_writeLong(MCFSIM_DACR0, 0x0000322c); // Set DACR0[IP] (bit 3) *((volatile unsigned long *) 0x00) = junk; // write to a memory location to init. precharge delay(0x10); // Allow several Precharge cycles /** Refresh Sequence **/ mbar_writeLong(MCFSIM_DACR0, 0x0000b224); // Enable the refresh bit, DACR0[RE] (bit 15) delay(0x7d0); // Allow gobs of refresh cycles /** Mode Register initialization **/ mbar_writeLong(MCFSIM_DACR0, 0x0000b264); // Enable DACR0[IMRS] (bit 6); RE remains enabled *((volatile unsigned long *) 0x800) = junk; // Access RAM to initialize the mode register}
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