/*
 * File:		amd29f016.h
 * Purpose:		Header file containing data definitions for the
 *				AMD 29F016 Flash memory device. 2Mx8
 *
 * Notes:
 *
 * Author:		Eric DeVolder
 * Date:		12-14-95
 *
 * Modifications:
 *
 */

#ifndef _AMD29F016_H
#define _AMD29F016_H

/*
 * The AMD29F016 FLASH devices.  These devices are 2M x 8 devices.
 */
#define AMD29F016_SECTOR_SIZE		(64 * 1024)
#define AMD29F016_SECTORS			(32)

#define AMD29F016_ADDR1				(0x5555)
#define AMD29F016_ADDR2				(0x2AAA)

/*
 * PCMCIA AMDC020 FLASH card
 */
#if (defined(AMD29F016_FOR_AMDC020))
#define AMD29F016_16BIT_WIDE
#endif

#if (defined(AMD29F016_32BIT_WIDE))
typedef volatile uint32 AMD29F016_CELL;

#define AMD29F016_READ_CMD1			(0xAAAAAAAA)
#define AMD29F016_READ_CMD2			(0x55555555)
#define AMD29F016_READ_CMD3			(0xF0F0F0F0)

#define AMD29F016_AUTOSELECT_CMD1	(0xAAAAAAAA)
#define AMD29F016_AUTOSELECT_CMD2	(0x55555555)
#define AMD29F016_AUTOSELECT_CMD3	(0x90909090)

#define AMD29F016_BYTEPROG_CMD1		(0xAAAAAAAA)
#define AMD29F016_BYTEPROG_CMD2		(0x55555555)
#define AMD29F016_BYTEPROG_CMD3		(0xA0A0A0A0)

#define AMD29F016_CHIPERASE_CMD1	(0xAAAAAAAA)
#define AMD29F016_CHIPERASE_CMD2	(0x55555555)
#define AMD29F016_CHIPERASE_CMD3	(0x80808080)
#define AMD29F016_CHIPERASE_CMD4	(0xAAAAAAAA)
#define AMD29F016_CHIPERASE_CMD5	(0x55555555)
#define AMD29F016_CHIPERASE_CMD6	(0x10101010)

#define AMD29F016_SECTORERASE_CMD1	(0xAAAAAAAA)
#define AMD29F016_SECTORERASE_CMD2	(0x55555555)
#define AMD29F016_SECTORERASE_CMD3	(0x80808080)
#define AMD29F016_SECTORERASE_CMD4	(0xAAAAAAAA)
#define AMD29F016_SECTORERASE_CMD5	(0x55555555)
#define AMD29F016_SECTORERASE_CMD6	(0x30303030)

#define AMD29F016_AMD_CODE			(0x01010101)
#define AMD29F016_DEVICE_CODE		(0xADADADAD)
#define AMD29F016_SECTORERASE_DONE	(0x80808080)
#define AMD29F016_DATA_POLL_MASK	(0x80808080)
#define AMD29F016_TIME_EXCEEDED		(0x20202020)
#endif

#if (defined(AMD29F016_16BIT_WIDE))
typedef volatile uint32 AMD29F016_CELL;

#define AMD29F016_READ_CMD1			(0xAAAA)
#define AMD29F016_READ_CMD2			(0x5555)
#define AMD29F016_READ_CMD3			(0xF0F0)

#define AMD29F016_AUTOSELECT_CMD1	(0xAAAA)
#define AMD29F016_AUTOSELECT_CMD2	(0x5555)
#define AMD29F016_AUTOSELECT_CMD3	(0x9090)

#define AMD29F016_BYTEPROG_CMD1		(0xAAAA)
#define AMD29F016_BYTEPROG_CMD2		(0x5555)
#define AMD29F016_BYTEPROG_CMD3		(0xA0A0)

#define AMD29F016_CHIPERASE_CMD1	(0xAAAA)
#define AMD29F016_CHIPERASE_CMD2	(0x5555)
#define AMD29F016_CHIPERASE_CMD3	(0x8080)
#define AMD29F016_CHIPERASE_CMD4	(0xAAAA)
#define AMD29F016_CHIPERASE_CMD5	(0x5555)
#define AMD29F016_CHIPERASE_CMD6	(0x1010)

#define AMD29F016_SECTORERASE_CMD1	(0xAAAA)
#define AMD29F016_SECTORERASE_CMD2	(0x5555)
#define AMD29F016_SECTORERASE_CMD3	(0x8080)
#define AMD29F016_SECTORERASE_CMD4	(0xAAAA)
#define AMD29F016_SECTORERASE_CMD5	(0x5555)
#define AMD29F016_SECTORERASE_CMD6	(0x3030)

#define AMD29F016_AMD_CODE			(0x0101)
#if (!defined(AMD29F016_FOR_AMDC020))
#define AMD29F016_DEVICE_CODE		(0xADAD)
#else
#define AMD29F016_DEVICE_CODE		(0x3D3D)
#endif
#define AMD29F016_SECTORERASE_DONE	(0x8080)
#define AMD29F016_DATA_POLL_MASK	(0x8080)
#define AMD29F016_TIME_EXCEEDED		(0x2020)
#endif

#if (defined(AMD29F016_8BIT_WIDE))
typedef volatile uint32 AMD29F016_CELL;

#define AMD29F016_READ_CMD1			(0xAA)
#define AMD29F016_READ_CMD2			(0x55)
#define AMD29F016_READ_CMD3			(0xF0)

#define AMD29F016_AUTOSELECT_CMD1	(0xAA)
#define AMD29F016_AUTOSELECT_CMD2	(0x55)
#define AMD29F016_AUTOSELECT_CMD3	(0x90)

#define AMD29F016_BYTEPROG_CMD1		(0xAA)
#define AMD29F016_BYTEPROG_CMD2		(0x55)
#define AMD29F016_BYTEPROG_CMD3		(0xA0)

#define AMD29F016_CHIPERASE_CMD1	(0xAA)
#define AMD29F016_CHIPERASE_CMD2	(0x55)
#define AMD29F016_CHIPERASE_CMD3	(0x80)
#define AMD29F016_CHIPERASE_CMD4	(0xAA)
#define AMD29F016_CHIPERASE_CMD5	(0x55)
#define AMD29F016_CHIPERASE_CMD6	(0x10)

#define AMD29F016_SECTORERASE_CMD1	(0xAA)
#define AMD29F016_SECTORERASE_CMD2	(0x55)
#define AMD29F016_SECTORERASE_CMD3	(0x80)
#define AMD29F016_SECTORERASE_CMD4	(0xAA)
#define AMD29F016_SECTORERASE_CMD5	(0x55)
#define AMD29F016_SECTORERASE_CMD6	(0x30)

#define AMD29F016_AMD_CODE			(0x01)
#define AMD29F016_DEVICE_CODE		(0xAD)
#define AMD29F016_SECTORERASE_DONE	(0x80)
#define AMD29F016_DATA_POLL_MASK	(0x80)
#define AMD29F016_TIME_EXCEEDED		(0x20)
#endif

typedef enum
{
	AMD29F016_SECTOR_0 = 0,
	AMD29F016_SECTOR_1 = 1,
	AMD29F016_SECTOR_2 = 2,
	AMD29F016_SECTOR_3 = 3,
	AMD29F016_SECTOR_4 = 4,
	AMD29F016_SECTOR_5 = 5,
	AMD29F016_SECTOR_6 = 6,
	AMD29F016_SECTOR_7 = 7,
	AMD29F016_SECTOR_8 = 8,
	AMD29F016_SECTOR_9 = 9,
	AMD29F016_SECTOR_10 = 10,
	AMD29F016_SECTOR_11 = 11,
	AMD29F016_SECTOR_12 = 12,
	AMD29F016_SECTOR_13 = 13,
	AMD29F016_SECTOR_14 = 14,
	AMD29F016_SECTOR_15 = 15,
	AMD29F016_SECTOR_16 = 16,
	AMD29F016_SECTOR_17 = 17,
	AMD29F016_SECTOR_18 = 18,
	AMD29F016_SECTOR_19 = 19,
	AMD29F016_SECTOR_20 = 20,
	AMD29F016_SECTOR_21 = 21,
	AMD29F016_SECTOR_22 = 22,
	AMD29F016_SECTOR_23 = 23,
	AMD29F016_SECTOR_24 = 24,
	AMD29F016_SECTOR_25 = 25,
	AMD29F016_SECTOR_26 = 26,
	AMD29F016_SECTOR_27 = 27,
	AMD29F016_SECTOR_28 = 28,
	AMD29F016_SECTOR_29 = 29,
	AMD29F016_SECTOR_30 = 30,
	AMD29F016_SECTOR_31 = 31
} AMD29F016_SECTOR;

/*****************************************************************/
typedef volatile struct
{
	AMD29F016_CELL	manuf;
	AMD29F016_CELL	id;
	AMD29F016_CELL	reserved0[AMD29F016_ADDR2 - 2];
	AMD29F016_CELL	cmdreg2;
	AMD29F016_CELL	reserved1[AMD29F016_ADDR1 - AMD29F016_ADDR2 - 1];
	AMD29F016_CELL	cmdreg1;
} AMD29F016_DEVICE;

typedef volatile struct
{
	AMD29F016_CELL data[AMD29F016_SECTOR_SIZE];
} AMD29F016_SECTORDATA;

typedef volatile union
{
	AMD29F016_DEVICE		device;
	AMD29F016_SECTORDATA	sector[AMD29F016_SECTORS];

} AMD29F016;

/*****************************************************************/
int
amd29f016_id (AMD29F016 *);

int
amd29f016_sector_erase (AMD29F016 *, AMD29F016_SECTOR);

int
amd29f016_write (AMD29F016 *, void *, unsigned,
	AMD29F016_SECTOR, void (*)(void));

/*****************************************************************/
 
#define CONCAT(X,Y)     CONCAT2(X,Y)
#define CONCAT2(X,Y)    X ## Y
 
#define AMD29F016_START         CONCAT(amd29f016_start_,AMD29F016_WIDTH)
#define AMD29F016_READ          CONCAT(amd29f016_read_,AMD29F016_WIDTH)
#define AMD29F016_SECTOR_ERASE	CONCAT(amd29f016_sector_erase_,AMD29F016_WIDTH)
#define AMD29F016_ID            CONCAT(amd29f016_id_,AMD29F016_WIDTH)
#define AMD29F016_WRITE         CONCAT(amd29f016_write_,AMD29F016_WIDTH)
#define AMD29F016_END           CONCAT(amd29f016_end_,AMD29F016_WIDTH)
 
int
AMD29F016_ID (AMD29F016 *);
 
int
AMD29F016_SECTOR_ERASE (AMD29F016 *, AMD29F016_SECTOR);
 
int
AMD29F016_WRITE (AMD29F016 *, void *, unsigned,
    AMD29F016_SECTOR, void (*)(void));
 

/*****************************************************************/

#endif /* _AMD29F016_H */