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<TD><IMG height=5
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<H2>Digitally Removing a DC Offset (or "DSP Without Math?") - Part
2</H2></FONT></TD></TR></TBODY></TABLE>
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<TD align=right>Back to <A
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Removing a DC Offset (or "DSP Without Math?")</B></A> </TD></TR></TBODY></TABLE>
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<TD width="50%"><FONT face="Times New Roman" size=2><B>Author: </B>Ken
Chapman<BR></FONT></TD>
<TD bgColor=#e7e7de><FONT face="Times New Roman" size=2><B>Publication
Date:</B> 02/03/2003<BR></FONT></TD></TR></TBODY></TABLE>
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<H4>Introduction</H4>
<P>
<P>Welcome to the second part of this TechXclusive! Were you were able to
spot the first optimisations that I am going to make to the circuit? </P>
<P>After the optimisations are made to the algorithm, I will focus on how
to make a smaller and more efficient version for audio telecom
applications. This is pure hardware engineering, and I don't feel that any
design is complete until it has an SRL16E in it! I suggest you read my
previous TechXclusive articles about the SRL16E before you read the last
section of this one. </P>
<P>
<H4>Removing the Multiplier Logic</H4>
<P>
<P>Potentially, the largest part of the circuit so far is the multiplier.
Although you may have some dedicated multipliers to spare in future
Virtex?-II designs, it is likely that the multiplier is costing slices in
most cases. For really cost-sensitive designs with Spartan?-II, we should
be doing everything possible to reduce size and stay in the smallest
device. </P>
<P>It is actually very easy to remove the multiplier from this circuit,
and hopefully you have already seen how it can be achieved. I left a
rather big clue on the two response plots in the last article by
specifying the coefficient values as k=1/32 and k=1/256. In both cases,
these values are represented by numbers in which only one bit is active. I
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