-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 06/19/2008 13:29:30      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "counter32b"
BEGIN

    DEVICE = "EP1K10TC100-1";

    "CLK"                          : INPUT_PIN  = 39     ;
    "CLR"                          : INPUT_PIN  = 38     ;
    "ENA"                          : INPUT_PIN  = 40     ;
    "CARRY_OUT"                    : OUTPUT_PIN = 21     ;
    "CQ0"                          : OUTPUT_PIN = 19     ;
    "CQ1"                          : OUTPUT_PIN = 20     ;
    "CQ2"                          : OUTPUT_PIN = 23     ;
    "CQ3"                          : OUTPUT_PIN = 22     ;
    "|LPM_ADD_SUB:82|addcore:adder|:59" : LOCATION   = LC6_C13;
    "|LPM_ADD_SUB:82|addcore:adder|:77" : LOCATION   = LC8_C13;
    ":9"                           : LOCATION   = LC5_C13;  -- CQI3
    ":10"                          : LOCATION   = LC7_C13;  -- CQI2
    ":11"                          : LOCATION   = LC2_C13;  -- CQI1
    ":12"                          : LOCATION   = LC1_C13;  -- CQI0
    ":48"                          : LOCATION   = LC3_C13;
    ":194"                         : LOCATION   = LC4_C13;

END;

INTERNAL_INFO "counter32b"
BEGIN
	DEVICE = EP1K10TC100-1;
    OD5P39  : LORAX = "1:FB5->LC5_C13,->LC7_C13,->LC2_C13,->LC1_C13|";
    OD2P38  : LORAX = "1:FB2->LC5_C13,->LC7_C13,->LC2_C13,->LC1_C13|";
    OD3P40  : LORAX = "1:FB3|2:FH3R2,PA5R2C12->LC5_C13,->LC7_C13,->LC2_C13,->LC1_C13||";
    LC5_C13 : LORAX = "1:MSW4R2C13,HHR36R2->OH4R2P22|";
    LC7_C13 : LORAX = "1:MSW6R2C13,HHR32R2->OH6R2P23|";
    LC2_C13 : LORAX = "1:MSW1R2C13,G29R2->OH1R2P20|";
    LC1_C13 : LORAX = "1:MSW0R2C13,HHR23R2->OH0R2P19|";
    LC4_C13 : LORAX = "1:MSW3R2C12,HHR9R2->OH3R2P21|";
	LC6_C13 : LORAX2 = "X, X, LC1_C13, LC2_C13";
	LC8_C13 : LORAX2 = "LC5_C13, LC7_C13, LC2_C13, LC1_C13";
	LC5_C13 : LORAX2 = "OD3P40, LC8_C13, LC3_C13, LC5_C13";
	LC7_C13 : LORAX2 = "OD3P40, LC6_C13, LC3_C13, LC7_C13";
	LC2_C13 : LORAX2 = "OD3P40, LC3_C13, LC2_C13, LC1_C13";
	LC1_C13 : LORAX2 = "X, OD3P40, LC3_C13, LC1_C13";
	LC3_C13 : LORAX2 = "LC1_C13, LC5_C13, LC7_C13, LC2_C13";
	LC4_C13 : LORAX2 = "LC5_C13, LC1_C13, LC7_C13, LC2_C13";
END;