?? strata16.c
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/*****************************************
NAME: strata16.c
DESC: Program Strata 16-bit NOR Flash(32MB)
HISTORY: 2004.2.16(S3C24A0A)
*****************************************/
#include <stdlib.h>
#include <string.h>
#include "def.h"
#include "option.h"
#include "24a0addr.h"
#include "24a0lib.h"
#include "24a0slib.h"
#include "strata16.h"
static void InputAddresses(void);
//static void PageModeTest(void);
static int Strata_ProgFlash(U32 realAddr,U16 data);
static void Strata_EraseSector(int targetAddr);
static int Strata_CheckID(int targetAddr);
static int Strata_CheckDevice(int targetAddr);
static int Strata_CheckBlockLock(int targetAddr);
static int Strata_ClearBlockLock(int targetAddr);
static int Strata_BlankCheck(int targetAddr,int targetSize);
static int _WAIT(void);
extern U32 downloadAddress;
extern U32 downloadProgramSize;
static U32 srcAddress;
static U32 targetOffset;
static U32 targetAddress;
static U32 targetSize;
// Because S3C2410 is connected to Intel StrataFlash 28F128J3A,
// the addr parameter has to be a WORD address, so called in Intel specification.
#define _WR(addr,data) *((volatile U16 *)(addr))=(U16)data
#define _RD(addr) ( *((volatile U16 *)(addr)) )
// _RESET() : Read Array
#define _RESET() _WR(targetAddress,0x00ff)
extern U32 downloadAddress;
extern U32 downloadProgramSize;
static int error_erase=0; // Read Status Register, SR.5
static int error_program=0; // Read Status Register, SR.4
//==========================================================================================
static int Strata_CheckID(int targetAddr)
{
_RESET();
_WR(targetAddr, 0x0090);
Uart_Printf("Identification code=%x, Target Addr=%x\n",_RD(targetAddr), targetAddr);
return _RD(targetAddr); // Read Identifier Code, including lower, higher 16-bit, 8MB, Intel Strate Flash ROM
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
static int Strata_CheckDevice(int targetAddr)
{
//_RESET();
_WR(targetAddr, 0x0090);
Uart_Printf("Identification code=%x\n",_RD(targetAddr+0x2));
return _RD(targetAddr+0x2); // Read Device Code, including lower, higher 16-bit, 8MB, Intel Strate Flash ROM
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
static int Strata_CheckBlockLock(int targetAddr)
{
//_RESET();
_WR(targetAddr, 0x0090);
return _RD(targetAddr+0x4); // Read Block Lock configuration,
// targetAddress must be the beginning location of a Block Address
}
//==========================================================================================
static int Strata_ClearBlockLock(int targetAddr)
{
U32 status,ReadStatus;
unsigned long bSR7,bSR1;
//_RESET();
_WR(targetAddr, 0x0060);
_WR(targetAddr, 0x00d0);
_WR(targetAddr, 0x0090);
status=_RD(targetAddr+0x4);
bSR7=status & (1<<7);
bSR1=status & (1<<1);
Uart_Printf("Block status register value: %x\n",status);
while(bSR1)
{
_WR(targetAddr, 0x0090);
status=_RD(targetAddr+0x4);
bSR1=status & (1<<1);
if(!bSR1)break;
}
Uart_Printf("Device is unlocked\n");
_WR(targetAddr, 0x0070); // Read Status Register
ReadStatus=_RD(targetAddr); // realAddr is any valid address within the device
bSR7=ReadStatus & (1<<7);
while(!bSR7 )
{
_WR(targetAddr, 0x0070); // Read Status Register
ReadStatus=_RD(targetAddr);
bSR7=ReadStatus & (1<<7);
}
_RESET();
}
//==========================================================================================
void Strata_EraseSector(int targetAddress)
{
unsigned long ReadStatus;
unsigned long bSR5; // Erase and Clear Lock-bits Status, lower 16bit, 8MB Intel Strate Flash ROM
unsigned long bSR7; // Write State Machine Status, lower 16bit, 8MB Intel Strate Flash ROM
//_RESET();
_WR(targetAddress, 0x0020); // Block Erase, First Bus Cycle, targetAddress is the address withint the block
_WR(targetAddress, 0x00d0); // Block Erase, Second Bus Cycle, targetAddress is the address withint the block
//_RESET();
_WR(targetAddress, 0x0070); // Read Status Register, First Bus Cycle, targetAddress is any valid address within the device
ReadStatus=_RD(targetAddress); // Read Status Register, Second Bus Cycle, targetAddress is any valid address within the device
bSR7=ReadStatus & (1<<7); // lower 16-bit 8MB Strata
while(!bSR7)
{
_WR(targetAddress, 0x0070);
ReadStatus=_RD(targetAddress);
bSR7=ReadStatus & (1<<7);
}
_WR(targetAddress, 0x0070); // When the block erase is complete, status register bit SR.5 should be checked.
// If a block erase error is detected, the status register should be cleared before
// system software attempts correct actions.
ReadStatus=_RD(targetAddress);
bSR5=ReadStatus & (1<<5); // lower 16-bit 8MB Strata
if (bSR5==0)
{
Uart_Printf("Block_%x Erase O.K. \n",targetAddress);
}
else
{
//Uart_Printf("Error in Block Erasure!!\n");
_WR(targetAddress, 0x0050); // Clear Status Register
error_erase=1; // But not major, is it casual ?
}
_RESET(); // write 0xffh(_RESET()) after the last opoeration to reset the device to read array mode.
}
//==========================================================================================
int Strata_BlankCheck(int targetAddr,int targetSize)
{
int i,j;
for (i=0; i<targetSize; i+=2)
{
j=*((volatile U16 *)(i+targetAddr));
if (j!=0xffff) // In erasure it changes all block dta to 0xff
{
Uart_Printf("E : %x = %x\n", (i+targetAddr), j);
return 0;
}
}
return 1;
}
int Strata_ProgFlash(U32 realAddr,U16 data)
{
volatile U16 *ptargetAddr;
unsigned int ReadStatus, status;
unsigned int bSR7,bSR1,bSR4; // Write State Machine Status, 8MB Intel Strate Flash ROM
ptargetAddr = (volatile U16 *)realAddr;
_WR(realAddr, 0x0040); // realAddr is any valid adress within the device
*ptargetAddr=data; // 16 bit data
_WR(realAddr, 0x0070); // Read Status Register
ReadStatus=_RD(realAddr); // realAddr is any valid address within the device
bSR7=ReadStatus & (1<<7);
while(!bSR7 )
{
_WR(realAddr, 0x0070); // Read Status Register
ReadStatus=_RD(realAddr);
bSR7=ReadStatus & (1<<7);
}
_WR(realAddr, 0x0070);
ReadStatus=_RD(realAddr); // Real Status Register
if(ReadStatus&(1<<3))
{
Uart_Printf("Voltage Range Error\n");
_WR(realAddr, 0x0050); // Clear Status Register
return 0;
}
if(ReadStatus&(1<<1))
{
Uart_Printf("Device Protect Error\n");
_WR(realAddr, 0x0050); // Clear Status Register
return 0;
}
if(ReadStatus&(1<<4))
{
Uart_Printf("Programming Error\n");
_WR(realAddr, 0x0050); // Clear Status Register
return 0;
}
}
#define TARGET_ADDR_28F128 0x08000000 // nGCS2
#define SOURCE_ADDR_FOR_28F128 0x11000000 // After 16MB of SDRAM
// 0x30000000 - 0x30ffffff : Area for this test program
//==========================================================================================
void Program28F256K3_16Bit(void)
{
// FlashROM write program must reside at RAM region NOT ROM region
// In reading and writing all interrupts are disabled because the flash ROM
// strongly dislike to be disturbed by other stuff.
// And the region of flash ROM must be I/O region which means NO cacheable
// and NO bufferable in MMU. Check it out !!!
// 2001.6.18. Mon. It's local rain. I'll hope it eliminates the drought in Korea. by chc
unsigned long interrupt_reservoir;
int i;
Uart_Printf("\n[ 28F128J3A-16bit Flash Writing Program ]\n\n");
rSROM_BW=rSROM_BW&~(1<<9);
rSROM_BW=(rSROM_BW&~(0x40))|(0x1<<6);
rINTMSK = BIT_ALLMSK;
targetAddress=TARGET_ADDR_28F128;
targetSize=downloadProgramSize;
Uart_Printf("Src size=%x\n",targetSize);
if(targetSize==0)
{
Uart_Printf("\nThe data must be downloaded using ICE or USB from 0x11000000\n");
srcAddress=downloadAddress;
}
else
{
srcAddress=downloadAddress+4; //to discard the data head for the size
}
InputAddresses(); //srcAddress,targetSize,targetOffset will be determined.
Uart_Printf("Source base address(0x11000000) = 0x%x\n",srcAddress);
Uart_Printf("Target base address(0x08000000) = 0x%x\n",targetAddress);
Uart_Printf("Target offset (0x0) = 0x%x\n",targetOffset);
Uart_Printf("Target size (0x20000*n) = 0x%x\n",targetSize);
if ( (Strata_CheckID(targetAddress) & 0xffff) != 0x0089) // ID number = 0x0089
{
Uart_Printf("Identification check error(%x)!!\n",Strata_CheckID(targetAddress) & 0xffff);
return ;
}
if ( (Strata_CheckDevice(targetAddress) & 0xffff) != 0x8803) // Device number=0x0018 0x8803
{
Uart_Printf("Device check error !!\n");
return ;
}
for(i=0;i<targetSize;i+=0x10000)
{
Strata_ClearBlockLock(targetAddress+targetOffset+i);
Strata_EraseSector(targetAddress+targetOffset+i);
}
Uart_Printf("\nErase the sector : 0x%x.\n", targetAddress);
if(!Strata_BlankCheck(targetAddress+targetOffset,targetSize))
{
Uart_Printf("Blank Check Error!!!\n");
return;
}
Uart_Printf("\nStart of the data writing...\n");
for (i=0; i<targetSize; i+=2)
{
Strata_ProgFlash(i+targetAddress+targetOffset, *((U16 *)(srcAddress+i)));
if(i%0x10000==0xfffc)
Uart_Printf("[%x]",(i+4)/0x10000);
}
Uart_Printf("\nEnd of the data writing \n");
_RESET();
Uart_Printf("Verifying Start...\n");
for (i=0; i<targetSize; i+=2)
{
if (*((U16 *)(i+targetAddress+targetOffset)) !=*((U16 *)(i+srcAddress)))
{
Uart_Printf("verify error src %08x = %04x\n", srcAddress+i, *((U16 *)(srcAddress+i)));
Uart_Printf("verify error des %08x = %04x\n", i+targetAddress+targetOffset, *((U16 *)(i+targetAddress)));
return;
}
}
// PageModeTest();
Uart_Printf("Verifying End!!!");
}
//==========================================================================================
static void InputAddresses(void)
{
Uart_Printf("\n[ 28F128J3A Writing Program ]\n");
Uart_Printf("\nSource size [0x?] : 0h~%xh\n",downloadProgramSize);
Uart_Printf("\nAvailable Target Offset Address:0h,10000h,20000h, ..., ff0000h\n");
Uart_Printf("Input target address offset [0x?] : ");
targetOffset=Uart_GetIntNum();
if(targetOffset==(U32)(-1)) targetOffset=0x0;
if(targetSize==0)
{
Uart_Printf("Input target size [0x?] : ");
if(targetOffset==(U32)(-1)) targetOffset=0x0;
targetSize=Uart_GetIntNum();
}
}
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