?? stc89c58rd+ flash-isp-iap.c
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/* --- STC International Limited ---------------- */
/* --- 宏晶科技 姚永平 設計 2004/9/11 V1.0 --- */
/* --- 宏晶科技 姚永平 設計 2004/12/4 V2.0 --- */
/* --- RD+/RC系列 Flash IAP/ISP Operation ----- */
/* --- STC89C54RD+, STC89C58RD+, STC89C516RD+ --- */
/* --- STC89LE54RD+,STC89LE58RD+,STC89LE516RD+ -- */
/* --- STC89C51RC, STC89C52RC, STC89C53RC ----- */
/* --- STC89LE51RC, STC89LE52RC, STC89LE53RC ---- */
/* --- Mobile: 13922805190 ---------------------- */
/* --- Fax: 0755-82944243 ----------------------- */
/* --- Tel: 0755-82908285 ----------------------- */
/* --- Web : www.mcu-memory.com ---------------- */
/* --- 感謝網友2004/12/3的指正,送樣品以示感謝 --- */
#include <reg52.h>
#include <intrins.h> /* use _nop_() function */
//sfr16 DPTR = 0x82;
/* 新增特殊功能寄存器定義 */
sfr ISP_DATA = 0xe2; /* ISP_DATA DATA 0E2H; 匯編程序定義 or EQU */
sfr ISP_ADDRH = 0xe3; /* ISP_ADDRH DATA 0E3H; 匯編程序定義 */
sfr ISP_ADDRL = 0xe4; /* ISP_ADDRL DATA 0E4H; 匯編程序定義 */
sfr ISP_CMD = 0xe5; /* ISP_CMD DATA 0E5H; 匯編程序定義 */
sfr ISP_TRIG = 0xe6; /* ISP_TRIG DATA 0E6H; 匯編程序定義 */
sfr ISP_CONTR = 0xe7; /* ISP_CONTR DATA 0E7H; 匯編程序定義 */
/* SFR: ISP_DATA (ISP Flash Data Register): E2H ------------------------*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| Data to be written into flash, or Data got from flash |---*/
/* SFR: ISP_ADDRH (ISP Flash Address High): E3H --------------------*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| High byte of the address pointing to flash |---*/
/* SFR: ISP_ADDRL (ISP Flash Address Low): E4H --------------------*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| Low byte of the address pointing to flash |---*/
/* SFR: ISP_CMD (ISP Flash Mode Table): E5H --------------------*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| reserved | Mode Selection |---*/
/* SFR: ISP_TRIG (Sequential Command Data register for ISP): E6H ----*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| ISP-Command |---*/
/* SFR: ISP_CONTR (ISP Control register): E7H --------------------*/
/*--| b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |---*/
/*--| ISPEN | SWBS | SWRST | - | - | WAIT |---*/
/*-- ISPEN: ISP function enabling bit ----------------*/
/*-- 0: Disable ISP program to change flash ----------------*/
/*-- 1: Enable ISP program to change flash ----------------*/
/*-- SWBS: Secondary Booting program selecting ----------------*/
/*-- 0: Boot from AP-Memory / Main-Memory ----------------*/
/*-- 1: Boot from ISP-Memory ----------------*/
/*-- SWRST: Software reset trigger ----------------*/
/*-- 0: No operation ----------------*/
/*-- 1: Generate software system reset. It will be cleared by hardware automatically ---*/
/* 定義命令 */
#define READ_AP_and_Data_Memory_Command 0x01 /* 字節讀應用程序區和數據存儲區 */
#define PROGRAM_AP_and_Data_Memory_Command 0x02 /* 字節編程應用程序區和數據存儲區 */
#define SECTOR_ERASE_AP_and_Data_Memory_Command 0x03 /* 扇區擦除應用程序區和數據存儲區 */
typedef unsigned char INT8U; /* 8 bit 無符號整型 */
typedef unsigned int INT16U; /* 16 bit 無符號整型 */
#define DELAY_CONST 60000
/* 定義常量 */
#define ERROR 0
#define OK 1
sbit Begin_LED = P1^0;
sbit ERROR_LED = P1^3;
sbit OK_LED = P1^7;
/* 定義Flash 操作等待時間 */
#define MCU_CLOCK_40MHz
//#define MCU_CLOCK_20MHz
//#define MCU_CLOCK_10MHz
//#define MCU_CLOCK_5MHz
#ifdef MCU_CLOCK_40MHz
#define WAIT_TIME 0x00
#endif
#ifdef MCU_CLOCK_20MHz
#define WAIT_TIME 0x01
#endif
#ifdef MCU_CLOCK_10MHz
#define WAIT_TIME 0x02
#endif
#ifdef MCU_CLOCK_5MHz
#define WAIT_TIME 0x03
#endif
/* 調試控制項 */
//#define DEBUG_STC89C_LE516RD+
//#define DEBUG_STC89C_LE58RD+
//#define DEBUG_STC89C_LE54RD+
//#define DEBUG_STC89C_LE53RC
#define DEBUG_STC89C_LE52RC
//#define DEBUG_STC89C_LE51RC
//#define USED_BYTE_QTY_IN_ONE_SECTOR 1
//#define USED_BYTE_QTY_IN_ONE_SECTOR 2
//#define USED_BYTE_QTY_IN_ONE_SECTOR 4
//#define USED_BYTE_QTY_IN_ONE_SECTOR 8
//#define USED_BYTE_QTY_IN_ONE_SECTOR 16
//#define USED_BYTE_QTY_IN_ONE_SECTOR 32
//#define USED_BYTE_QTY_IN_ONE_SECTOR 64
#define USED_BYTE_QTY_IN_ONE_SECTOR 128
//#define USED_BYTE_QTY_IN_ONE_SECTOR 256
//#define USED_BYTE_QTY_IN_ONE_SECTOR 512
INT8U xdata protect_buffer[USED_BYTE_QTY_IN_ONE_SECTOR];
#ifdef DEBUG_STC89C_LE516RD+ //STC89C516RD+, 89LE516RD+
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0xf600
#define DEBUG_AP_Memory_End_Byte_addr 0xf7ff
#endif
#ifdef DEBUG_STC89C_LE58RD+ //STC89C58RD+, 89LE58RD+
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0x7e00
#define DEBUG_AP_Memory_End_Byte_addr 0x7fff
#define DEBUG_Data_Memory_Begin_Sector_addr 0x8000
#define DEBUG_Data_Memory_End_Sector_addr 0xf600
#define DEBUG_Data_Memory_End_Byte_addr 0xf7ff
#endif
#ifdef DEBUG_STC89C_LE54RD //STC89C54RD+, 89LE54RD+
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0x3e00
#define DEBUG_AP_Memory_End_Byte_addr 0x3fff
#define DEBUG_Data_Memory_Begin_Sector_addr 0x4000
#define DEBUG_Data_Memory_End_Sector_addr 0xbe00
#define DEBUG_Data_Memory_End_Byte_addr 0xbfff
// #define DEBUG_Data_Memory_End_Sector_addr 0xf600
// #define DEBUG_Data_Memory_End_Byte_addr 0xf7ff
#endif
#ifdef DEBUG_STC89C_LE53RC //STC89C53RC, 89LE53RC
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0x3600
#define DEBUG_AP_Memory_End_Byte_addr 0x37ff
#endif
#ifdef DEBUG_STC89C_LE52RC //STC89C52RC, 89LE52RC
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0x1e00
#define DEBUG_AP_Memory_End_Byte_addr 0x1fff
#define DEBUG_Data_Memory_Begin_Sector_addr 0x2000
#define DEBUG_Data_Memory_End_Sector_addr 0x2e00
#define DEBUG_Data_Memory_End_Byte_addr 0x2fff
// #define DEBUG_Data_Memory_End_Sector_addr 0x3600
// #define DEBUG_Data_Memory_End_Byte_addr 0x37ff
#endif
#ifdef DEBUG_STC89C_LE51RC //STC89C51RC, 89LE51RC
#define DEBUG_AP_Memory_Begin_Sector_addr 0x0000
#define DEBUG_AP_Memory_End_Sector_addr 0x0e00
#define DEBUG_AP_Memory_End_Byte_addr 0x0fff
#define DEBUG_Data_Memory_Begin_Sector_addr 0x1000
#define DEBUG_Data_Memory_End_Sector_addr 0x1e00
#define DEBUG_Data_Memory_End_Byte_addr 0x1fff
// #define DEBUG_Data_Memory_End_Sector_addr 0x3600
// #define DEBUG_Data_Memory_End_Byte_addr 0x37ff
#endif
/* 打開 ISP,IAP 功能 */
void ISP_IAP_enable(void)
{
EA = 0; /* 關中斷 */
ISP_CONTR = ISP_CONTR & 0x18; /* 0001,1000 */
ISP_CONTR = ISP_CONTR | WAIT_TIME;
ISP_CONTR = ISP_CONTR | 0x80; /* 1000,0000 */
}
/* 關閉 ISP,IAP 功能 */
void ISP_IAP_disable(void)
{
ISP_CONTR = ISP_CONTR & 0x7f; /* 0111,1111 */
ISP_TRIG = 0x00;
EA = 1; /* 開中斷 */
}
/* 字節讀 */
INT8U byte_read(INT16U byte_addr)
{
ISP_ADDRH = (INT8U)(byte_addr >> 8);
ISP_ADDRL = (INT8U)(byte_addr & 0x00ff);
ISP_CMD = ISP_CMD & 0xf8; /* 1111,1000 */
ISP_CMD = ISP_CMD | READ_AP_and_Data_Memory_Command; /* 0000,0001 */
ISP_IAP_enable();
ISP_TRIG = 0x46;
ISP_TRIG = 0xb9;
_nop_();
ISP_IAP_disable();
return (ISP_DATA);
}
/* 扇區擦除 */
INT8U sector_erase(INT16U sector_addr)
{
INT16U get_sector_addr = 0;
get_sector_addr = (sector_addr & 0xfe00); /* 1111,1110,0000,0000; 取扇區地址 */
ISP_ADDRH = (INT8U)(get_sector_addr >> 8);
ISP_ADDRL = 0x00;
ISP_CMD = ISP_CMD & 0xf8; /* 1111,1000 */
ISP_CMD = ISP_CMD | SECTOR_ERASE_AP_and_Data_Memory_Command; /* 0000,0011 */
ISP_IAP_enable();
ISP_TRIG = 0x46; /* 觸發ISP_IAP命令 */
ISP_TRIG = 0xb9; /* 觸發ISP_IAP命令 */
_nop_();
ISP_IAP_disable();
return OK;
}
/* 字節編程 */
INT8U byte_program(INT16U byte_addr, INT8U original_data)
{
ISP_ADDRH = (INT8U)(byte_addr >> 8);
ISP_ADDRL = (INT8U)(byte_addr & 0x00ff);
ISP_CMD = ISP_CMD & 0xf8; /* 1111,1000 */
ISP_CMD = ISP_CMD | PROGRAM_AP_and_Data_Memory_Command; /* 0000,0010 */
ISP_DATA = original_data;
ISP_IAP_enable();
ISP_TRIG = 0x46; /* 觸發ISP_IAP命令 */
ISP_TRIG = 0xb9; /* 觸發ISP_IAP命令 */
_nop_();
ISP_IAP_disable();
return OK;
}
/* 字節編程并校驗 */
INT8U byte_program_and_verify(INT16U byte_addr, INT8U original_data)
{
ISP_ADDRH = (INT8U)(byte_addr >> 8);
ISP_ADDRL = (INT8U)(byte_addr & 0x00ff);
ISP_CMD = ISP_CMD & 0xf8; /* 1111,1000 */
ISP_CMD = ISP_CMD | PROGRAM_AP_and_Data_Memory_Command; /* 0000,0010 */
ISP_DATA = original_data;
ISP_IAP_enable();
ISP_TRIG = 0x46;
ISP_TRIG = 0xb9;
_nop_();
ISP_DATA = 0x00;
ISP_CMD = ISP_CMD & 0xf8; /* 1111,1000 */
ISP_CMD = ISP_CMD | READ_AP_and_Data_Memory_Command; /* 0000,0001 */
ISP_TRIG = 0x46; /* 觸發ISP_IAP命令 */
ISP_TRIG = 0xb9; /* 觸發ISP_IAP命令 */
_nop_();
ISP_IAP_disable();
if(ISP_DATA == original_data)
return OK;
else
return ERROR;
}
/* 寫數據進 數據Flash存儲器, 只在同一個扇區內寫，不保留原有數據 */
/* begin_addr,被寫數據Flash開始地址；counter,連續寫多少個字節； array[]，數據來源 */
INT8U sequential_write_flash_in_one_sector(INT16U begin_addr, INT16U counter, INT8U array[])
{
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