;ds1202

        ;
        PROCESSOR       PIC16C54
        RADIX   DEC
        ;
#include "16c54.inc"
        ;
        cblock  8
        Timer1
        Timer2
        Timer3
        Count
        Second
        Minute
        Hour
        Date
        Month
        Day
        Year
        endc
        ;
; PB4 - CLOCK to calendar clock
#define SCLK portb,4
; PA2 - I/O to calendar clock.
#define CLKDATA porta,2
; PA3 - RST to calendar clock.
#define CLKRST porta,3
        ;
        org     0
        ;
RESET   movlw   00h
        movwf   porta   ;turn off outputs
        movwf   portb
        movlw   00h
        tris    portb   ;all outputs
        movlw   03h
        tris    porta   ;PA0,1 are inputs
        ;
;
; Set time
;
        call    RClock
        ;
        movlw   96h
        movwf   Year
        movlw   08h
        movwf   Date
        movlw   02h
        movwf   Day
        movlw   04h
        movwf   Month
        movlw   17h
        movwf   Hour
        movlw   25h
        movwf   Minute
        movlw   00h
        movwf   Second
        call    WClock

;all done
stop    goto    stop

        ;
;
; Write calendar clock
;
WClock  bcf     SCLK    ;negate clock
        nop
        nop
        nop
        nop
        bcf     CLKDATA
        bsf     CLKRST  ;negate RST
        movlw   03h
        tris    porta   ;I/O is output
        movlw   08eh    ;write control register
        call    wbyte
        movlw   00h     ;turn off WP
        call    wbyte
        movlw   7
        movwf   Timer3
        movlw   80h
        movwf   Count
        movlw   Second
        movwf   fsr
wc      bcf     CLKRST  ;assert RST
        bcf     SCLK    ;negate clock
        nop
        nop
        nop
        nop
        bsf     CLKRST  ;negate RST
        movf    Count,W
        call    wbyte
        movf    indf,W
        call    wbyte
        incf    fsr
        incf    Count
        incf    Count
        decfsz  Timer3
        goto    wc
        bcf     CLKRST  ;assert RST
        retlw   0
        ;
;
; Read calendar clock
;
RClock  bcf     SCLK    ;negate clock
        nop
        nop
        nop
        nop
        bcf     CLKDATA ;negate I/O
        bsf     CLKRST  ;negate RST
        movlw   03h
        tris    porta   ;I/O is output
        movlw   0bfh    ;burst read clock registers
        call    wbyte
        movlw   07h
        tris    porta   ;I/O is input
        movlw   Second
        movwf   fsr
        call    rbyte
        call    rbyte
        call    rbyte
        call    rbyte
        call    rbyte
        call    rbyte
        call    rbyte
        bcf     CLKRST  ;assert RST
        retlw   0
        ;
wbyte   movwf   Timer2
        movlw   8
        movwf   Timer1
wbit    bcf     SCLK
        btfss   Timer2,0
        bcf     CLKDATA
        btfsc   Timer2,0
        bsf     CLKDATA
        nop
        nop                     ;data to clock setup
        nop
        bsf     SCLK
        rrf     Timer2
        decfsz  Timer1
        goto    wbit
        retlw   0
        ;
rbyte   movlw   8
        movwf   Timer1
rbit    bcf     SCLK
        nop
        nop                     ;clock to data delay
        rrf     indf
        bcf     indf,7
        btfsc   CLKDATA
        bsf     indf,7
        bsf     SCLK
        nop
        nop
        decfsz  Timer1
        goto    rbit
        incf    fsr
        retlw   0
        ;
        org     1ffh
        goto    RESET
        ;
        end