?? led1.tdo
字號:
## NOTE: Do not edit this file.
## Auto generated by Project Navigator for VHDL Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module led
vcom -87 -explicit led_timesim.vhd
vcom -93 -explicit led1.timesim_vhw
vsim -t 1ps -sdfmax /UUT=led_timesim.sdf -lib work led1
do {led1.udo}
view wave
add wave *
view structure
view signals
run -all
## End
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