/*****************************************************************************
 *   L3.h:  Header file for Philips LPC23xx/24xx Family Microprocessors
 *
 *   Copyright(C) 2006, Philips Semiconductor
 *   All rights reserved.
 *
 *   History
 *   2005.10.01  ver 1.00    Prelimnary version, first Release
 *
******************************************************************************/
/* L3 Address of UDA 1341TS	 7:2 are 000101 */
/* L3 Address Mode bits 1:0 are D0 = 00, D1 = 10, STATUS = 10 */

#define L3D0_MODE 0x14
#define L3D1_MODE 0x15
#define L3STATUS_MODE 0x16
#define L3DATA_TYPE 2
#define L3ADDRESS_TYPE 1

#define L3s0_DC(x)   ((x & 0x1) <<0) 
#define L3s0_IF(x)   ((x & 0x7) <<1) 
#define L3s0_SCLK(x) ((x & 0x3) <<4) 
#define L3s0_RST(x)  ((x & 0x1) <<6)  
#define L3s0_CMD   ((0x00 & 0x1) <<7) 

#define L3s1_PC(x)   ((x & 0x3) <<0) 
#define L3s1_DS(x)   ((x & 0x1) <<2)  
#define L3s1_PDA(x)  ((x & 0x1) <<3) 
#define L3s1_PAD(x)  ((x & 0x1) <<4)  
#define L3s1_IGS(x)  ((x & 0x1) <<5)   
#define L3s1_OGS(x)  ((x & 0x1) <<6) 
#define L3s1_CMD   ((0x01 & 0x1) <<7)  

#define L3d0_VC(x)   ((x & 0x3F) <<0) 
#define L3d0_D0(x)   ((0x00 & 0x3) <<6)  
#define L3d0_CMD     ((0x00) <<6)   

#define L3d1_TR(x)  ((x & 0x3) <<0) 
#define L3d1_BB(x)  ((x & 0xF) <<2)  
#define L3d1_CMD  ((0x01) <<6)   

#define L3d2_M(x)  ((x & 0x3) <<0) 
#define L3d2_MT(x)  ((x & 0x1) <<2) 
#define L3d2_DE(x)  ((x & 0x3) <<3) 
#define L3d2_PP(x)  ((x & 0x1) <<5)  
#define L3d2_CMD  ((0x02 ) <<6)   

#define L3d3_EA(x)  ((x & 0x7) <<0) 
#define L3d3_CMD  ((0x03 ) <<6)   

#define L3d4_ED(x)  ((x & 0x1F) <<0) 
#define L3d4_CMD  ((0x07 ) <<5)   

#define L3ed0_MA(x)  ((x & 0x1F) <<0) 
#define L3ed0_CMD  ((0x00 ) <<0)   

#define L3ed1_MB(x)  ((x & 0x1F) <<0) 
#define L3ed1_CMD  ((0x01 ) <<0)   

#define L3ed2_MM(x)  ((x & 0x3) <<0) 
#define L3ed2_MS(x)  ((x & 0x7) <<2) 
#define L3ed2_CMD  ((0x02 ) <<0)   

#define L3ed4_IG(x)  ((x & 0x3) <<0) 
#define L3ed4_AG(x)  ((x & 0x1) <<4) 
#define L3ed4_CMD  ((0x04 ) <<0)   

#define L3ed5_IG(x)  ((x & 0x1F) <<0) 
#define L3ed5_CMD  ((0x05 ) <<0)   

#define L3ed6_AL(x)  ((x & 0x3) <<0) 
#define L3ed6_AT(x)  ((x & 0x7) <<3) 
#define L3ed6_CMD  ((0x06 ) <<0)   


#define UDA1431_FORMAT_I2S (0 << 1)#define UDA1431_FORMAT_16BIT (1 << 10)#define UDA1431_FORMAT_24BIT (2 << 10)#define UDA1431_FORMAT_32BIT (3 << 10)
#define UDA1431_16BIT (1 << 10)#define UDA1431_32BIT (3 << 10)#define UDA1431_MASTER (1 << 11)#define UDA1431_SLAVE  (0 << 11)

#define L3Mic_CH1 0x01
#define L3Mic_CH2 0x02 

typedef enum {L3_FREE=0x0, L3_ADDRESS =0x1, L3_DATA=0x2} COMMAND_STATUS_TYPE;

extern volatile DWORD L3Cmd; 	 /* 0 = device free; 1 = Sending Address Cmd; 2 Sending Data Cmd  */
extern volatile DWORD L3AddressData; 
extern volatile DWORD L3DataValue; 
extern volatile DWORD L3Data1ReadValue; 

extern volatile DWORD L3_status0, L3_status1;
extern volatile DWORD L3_data0_0, L3_data0_1, L3_data0_2, L3_data0_3, L3_data0_4;
extern volatile DWORD L3_data0_E0, L3_data0_E1, L3_data0_E2, L3_data0_E4;
extern volatile DWORD L3_data0_E5, L3_data0_E6;
extern volatile DWORD L3_data1_0;

extern void UDA1341_init(void);
extern void UDA1341_reset(void);
extern void UDA1341_mute(DWORD flag);
extern void UDA1341_display(void);

extern void L3_init_GPIO(void);

extern void L3_setMode(DWORD mode);
extern void L3_sendStatusData(DWORD command,DWORD value);
extern void L3_sendData0(DWORD command,DWORD value);

extern void L3_sendExtendedData0(DWORD command,DWORD value);
extern __irq void L3_Timer0_Handler (void);  
extern __irq void Timer1_Handler (void);  
extern void UDA1341_stop(void);
extern int UDA1341_is_dac_on(void);
extern int UDA1341_is_adc_on(void);
extern void UDA1341_stop_audio_out(void);
extern void UDA1341_stop_audio_in(void);
extern void UDA1341_volume_up_one(void);
extern void UDA1341_volume_down_one(void);

extern DWORD L3_readData1(void);