?? papr_oversampling.mdl
字號:
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Math
Operator "exp"
OutputSignalType "auto"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Same as first input"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
OutMin "[]"
OutMax "[]"
DataType "auto"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType Reference
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType SubSystem
ShowPortLabels "FromPortIcon"
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
Block {
BlockType FrameConversion
OutFrame "Frame based"
}
Block {
BlockType Reshape
OutputDimensionality "1-D array"
OutputDimensions "[1,1]"
}
Block {
BlockType MinMax
Function "min"
Inputs "1"
InputSameDT on
OutMin "[]"
OutMax "[]"
OutDataTypeMode "Inherit via internal rule"
OutDataType "fixdt(1,16,0)"
OutScaling "[]"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType RelationalOperator
Operator ">="
InputSameDT on
LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimization)"
LogicDataType "uint(8)"
ZeroCross on
SampleTime "-1"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Arial"
FontSize 14
FontWeight "normal"
FontAngle "normal"
UseDisplayTextAsClickCallback off
}
LineDefaults {
FontName "Arial"
FontSize 14
FontWeight "normal"
FontAngle "normal"
}
System {
Name "PAPR_oversampling"
Location [28, 374, 981, 934]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Bernoulli Binary\nGenerator"
Ports [0, 1]
Position [35, 113, 115, 157]
DialogController "commDDGCreate"
DialogControllerArgs "DataTag0"
SourceBlock "commrandsrc2/Bernoulli Binary\nGenerator"
SourceType "Bernoulli Binary Generator"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
P "0.5"
seed "61"
Ts "SampTime"
frameBased on
sampPerFrame "N*4"
orient off
outDataType "double"
}
Block {
BlockType Reference
Name "IFFT"
Ports [1, 1]
Position [450, 119, 490, 151]
DialogController "dspDDGCreate"
DialogControllerArgs "DataTag1"
SourceBlock "dspxfrm3/IFFT"
SourceType "IFFT"
CompMethod "Table lookup"
TableOpt "Speed"
BitRevOrder off
cs_in off
SkipNorm off
InheritFFTLength off
FFTLength "N*4"
mode "Complex"
additionalParams off
allowOverrides on
firstCoeffMode "Same word length as input"
firstCoeffWordLength "16"
firstCoeffFracLength "15"
outputMode "Inherit via internal rule"
outputWordLength "16"
outputFracLength "15"
accumMode "Inherit via internal rule"
accumWordLength "32"
accumFracLength "30"
prodOutputMode "Inherit via internal rule"
prodOutputWordLength "32"
prodOutputFracLength "30"
roundingMode "Floor"
overflowMode off
LockScale off
}
Block {
BlockType Reference
Name "Insert Zero"
Ports [1, 1]
Position [325, 113, 405, 157]
SourceBlock "commsequence2/Insert Zero"
SourceType "Insert Zero"
insertZeroVector "[ones(N/2,1);zeros(3*N,1);ones(N/2,1)]"
}
Block {
BlockType SubSystem
Name "Normalization"
Ports [1, 1]
Position [565, 110, 635, 160]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
System {
Name "Normalization"
Location [496, 726, 781, 814]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [25, 33, 55, 47]
IconDisplay "Port number"
}
Block {
BlockType Gain
Name "Gain"
Position [175, 25, 205, 55]
Gain "sqrt(N*4)"
ParameterDataTypeMode "Inherit via internal rule"
ParameterDataType "sfix(16)"
ParameterScaling "2^0"
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "Normalization"
Ports [1, 1]
Position [80, 22, 130, 58]
DialogController "dspDDGCreate"
DialogControllerArgs "DataTag2"
SourceBlock "dspmathops/Normalization"
SourceType "Normalization"
NormType "2-norm"
Bias "1e-10"
NormOver "Each column"
ColComp "on"
Dimension "1"
additionalParams "off"
allowOverrides "on"
outputMode "Same as product output"
outputWordLength "32"
outputFracLength "32"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "30"
prodOutputMode "Same as input"
prodOutputWordLength "32"
prodOutputFracLength "32"
roundingMode "Floor"
overflowMode "off"
LockScale "off"
}
Block {
BlockType Outport
Name "Out1"
Position [230, 33, 260, 47]
IconDisplay "Port number"
}
Line {
SrcBlock "Normalization"
SrcPort 1
DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Normalization"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Rectangular QAM\nModulator\nBaseband"
Ports [1, 1]
Position [180, 104, 280, 166]
SourceBlock "commdigbbndam3/Rectangular QAM\nModulator\nBaseband"
SourceType "Rectangular QAM Modulator Baseband"
M "16"
InType "Bit"
Enc "Gray"
Mapping "[0:15]"
PowType "Average Power"
MinDist "2"
AvgPow "1"
PeakPow "1"
Ph "0"
outDtype "double"
outWordLen "16"
outUDDataType "sfix(16)"
outFracLenMode "Best precision"
outFracLen "15"
}
Block {
BlockType SubSystem
Name "Subsystem"
Ports [1, 1]
Position [740, 114, 840, 156]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
System {
Name "Subsystem"
Location [265, 607, 1053, 997]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [30, 103, 60, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Math
Name "Math\nFunction"
Ports [1, 1]
Position [170, 95, 200, 125]
Operator "magnitude^2"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType MinMax
Name "MinMax"
Ports [1, 1]
Position [295, 95, 325, 125]
Function "max"
OutDataType "sfix(16)"
OutScaling "2^0"
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "dB Conversion"
Ports [1, 1]
Position [425, 91, 485, 129]
SourceBlock "dspmathops/dB Conversion"
SourceType "dB Conversion"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData "off"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
dBtype "dB"
intype "Power"
R "1"
fuzz "off"
}
Block {
BlockType Outport
Name "Out1"
Position [545, 103, 575, 117]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Math\nFunction"
DstPort 1
}
Line {
SrcBlock "Math\nFunction"
SrcPort 1
DstBlock "MinMax"
DstPort 1
}
Line {
SrcBlock "dB Conversion"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "MinMax"
SrcPort 1
DstBlock "dB Conversion"
DstPort 1
}
}
}
Block {
BlockType ToWorkspace
Name "To Workspace"
Position [870, 122, 930, 148]
VariableName "PAPR"
MaxDataPoints "inf"
SampleTime "-1"
SaveFormat "Array"
}
Line {
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
DstBlock "Rectangular QAM\nModulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "Rectangular QAM\nModulator\nBaseband"
SrcPort 1
DstBlock "Insert Zero"
DstPort 1
}
Line {
SrcBlock "IFFT"
SrcPort 1
DstBlock "Normalization"
DstPort 1
}
Line {
SrcBlock "Subsystem"
SrcPort 1
DstBlock "To Workspace"
DstPort 1
}
Line {
SrcBlock "Insert Zero"
SrcPort 1
DstBlock "IFFT"
DstPort 1
}
Line {
SrcBlock "Normalization"
SrcPort 1
DstBlock "Subsystem"
DstPort 1
}
}
}
MatData {
NumRecords 3
DataRecord {
Tag DataTag2
Data " %)30 . < 8 ( 0 % \" $ ! 0 . 0 8 ( ! % \" $ - 0 0 #0 $YO<FUA;&EZ871I;VX "
}
DataRecord {
Tag DataTag1
Data " %)30 . 8 8 ( 0 % \" $ ! 0 . , 8 ( ! % \" $ $ 0 0 0 249&5 "
}
DataRecord {
Tag DataTag0
Data " %)30 . > 8 ( 0 % \" $ ! 0 . 2 8 ( ! % \" $ 2 0 0 $@ $)E<FYO=6QL:4)I;F%R>4=E;@ "
}
}
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