?? sp_serialflashv1.lst
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< .DEFINE C_PLL_Freq_40M 0x0060 //
< .DEFINE C_PLL_Freq_49M 0x0080 //
<
<
< // Define for P_ADC_Ctrl
< //----------------------------------------------
< .if BODY_TYPE == SPCE061A
< .DEFINE C_AD_Enable 0x0001; //b0=1: enable A/D converter
< .DEFINE C_AD_Disable 0x0000; //b0=0: disable A/D converter
< .DEFINE C_AD_Line_In 0x0002; //b1=1: microphone disable
< .DEFINE C_AD_MIC_In 0x0000; //b1=0: microphone enable
< .DEFINE C_AGC_Enable 0x0004; //b2=1: enable AGC function
< .DEFINE C_AGC_Disable 0x0000; //b2=0: disable AGC function
< .DEFINE C_AD_Sample 0x0004; //b3=1: sample the analog signal(manual mode)
< .DEFINE C_AD_Hold 0x0000; //b3=0: hold(manual mode)
< .DEFINE C_Auto_Mode 0x0010; //b4=1: A/D auto mode
< .DEFINE C_Manual_Mode 0x0000; //b4=0: A/D manual mode
< //b5: ADINI?
< .DEFINE C_DAC_Current_2mA 0x0040; //b6=1: DAC current = 2mA @ vdd=3V(new option)
< .DEFINE C_DAC_Current_3mA 0x0000; //b6=0: DAC current = 3mA @ vdd=3V(Default)
< .DEFINE C_AD_Vref_VDD 0x0080; //b7=1: Vref is VDD
< .DEFINE C_AD_Vref_VRTPAD 0x0000; //b7=0: Vref is from pin "VRTPAD"
< .DEFINE C_AD_COMP 0x4000; //b14=1: output voltage of DAC0<Analog input signal
< //b14=0: output voltage of DAC0>Analog input signal
< .DEFINE C_AD_RDY 0x8000; //b15=1: A/D digital data ready; 0: not ready
< .endif
<
< .if BODY_TYPE == SPCE500A
< .DEFINE C_AD 0x0001 //
< .DEFINE C_DA 0x0000 //
< .DEFINE C_MIC 0x0000 //
< .DEFINE C_LINE 0x0002 //
< .endif
< //----------------------------------------------
<
<
< // Define for P_DAC_Ctrl
< //----------------------------------------------
< .if BODY_TYPE == SPCE061A
< .DEFINE C_DAC1_Direct 0x0000; // b8 b7: DAC1 latch
< .DEFINE C_DAC1_LatchA 0x0080; // Latch data to DAC1 by TimerA
< .DEFINE C_DAC1_LatchB 0x0100; // Latch data to DAC1 by TimerB
< .DEFINE C_DAC1_LatchAB 0x0180; // Latch data to DAC1 by TimerA or TimerB
<
< .DEFINE C_DAC2_Direct 0x0000; // b6 b5: DAC2 latch
< .DEFINE C_DAC2_LatchA 0x0020; // Latch data to DAC2 by TimerA
< .DEFINE C_DAC2_LatchB 0x0040; // Latch data to DAC2 by TimerB
< .DEFINE C_DAC2_LatchAB 0x0060; // Latch data to DAC2 by TimerA or TimerB
<
< .DEFINE C_ADC_Direct 0x0000; // b4 b3: ADC latch
< .DEFINE C_ADC_LatchA 0x0008; // Latch data to ADC by TimerA
< .DEFINE C_ADC_LatchB 0x0010; // Latch data to ADC by TimerB
< .DEFINE C_ADC_LatchAB 0x0018; // Latch data to ADC by TimerA or TimerB
< .endif
<
< .if BODY_TYPE == SPCE500A
< .DEFINE C_PushPull 0x0000 // b0, (default)
< .DEFINE C_DoubleEnd 0x0001 // b0
< .DEFINE C_DAC_Mode 0x0000 // b1, (default)
< .DEFINE C_PWM_Mode 0x0002 // b1
<
< .DEFINE C_D1_Direct 0x0000 // DAC1 latch
< .DEFINE C_D1_LatchA 0x0008 //
< .DEFINE C_D1_LatchB 0x0010 //
< .DEFINE C_D1_LatchAB 0x0018 //
<
< .DEFINE C_D2_Direct 0x0000 // DAC2 latch
< .DEFINE C_D2_LatchA 0x0020 //
< .DEFINE C_D2_LatchB 0x0040 //
< .DEFINE C_D2_LatchAB 0x00C0 //
< .endif
< //----------------------------------------------
<
< // Define for P_LVD_Ctrl
< //----------------------------------------------
< .if BODY_TYPE == SPCE061A
< .DEFINE C_LVD24V 0x0000; // LVD = 2.4V; b1b0
< .DEFINE C_LVD28V 0x0001; // LVD = 2.8V
< .DEFINE C_LVD32V 0x0002; // LVD = 3.2V
< .endif
<
< .if BODY_TYPE == SPCE500A
< .DEFINE C_LVD26V 0x0000 // LVD = 2.6V
< .DEFINE C_LVD30V 0x0001 // LVD = 3.0V
< .DEFINE C_LVD36V 0x0002 // LVD = 3.6V
< .DEFINE C_LVD40V 0x0003 // LVD = 4.0V
< .endif
<
< .DEFINE C_LVD_Result 0x8000; // b15 = 1: below the selected LVD level
< //----------------------------------------------
<
<
< // SPCE061 flash operation instruction definition
< //----------------------------------------------
< .if BODY_TYPE == SPCE061A
< .DEFINE C_EnableFlashAccess 0xAAAA;
< .DEFINE C_EraseFlashPage 0x5511;
< .DEFINE C_ProgramFlash 0x5533;
< .endif
< //----------------------------------------------
<
<
<
< //===============================================================
< // Sunplus APIs for SPCE 061A
< //===============================================================
< //////////////////////////////////////////////////
< // Note: This register will map to the P_INT_Ctrl
< // (0x7010), The SACMvxx.lib use this register to
< // combine with user's interrupt setting.
< // In SPCE061, it is not necessary since the
< // P_INT_Mask(0x702D) already does this. It is for
< // compatibility to keep it here.
< //////////////////////////////////////////////////
< //.EXTERNAL R_InterruptStatus
<
< //========================================================================================
< // End of SPCE061A.inc
< //========================================================================================
<
<
<
.DEFINE C_SIOCLOCK 0x0010; // CPUCLOCK/8
000080F0 .CODE
//////////////////////////////////////////////////////////////////
// Function: Send A Word to Serial Flash
// Syntax: SP_SIOSendAData(AddressLow,AddressHigh, data) Address must be even
// c level public
// Used register: r1,r2,r3
//////////////////////////////////////////////////////////////////
.public _SP_SIOSendAWord;
_SP_SIOSendAWord: .PROC
F_SIOSendAWord:
000080F0 88 DA PUSH BP,BP TO [SP];
000080F1 08 0B 01 00 BP = SP + 1;
000080F3 09 93 D3 00 r1=0x00C3+C_SIOCLOCK;
000080F5 19 D3 1E 70 [P_SIO_Ctrl]=r1; // clk=CPUclk/8, 24 bit address ;write
000080F7 03 92 R1 = [BP+3];
000080F8 19 D3 1B 70 [P_SIO_Addr_Low]=r1; // input Sflash low address
000080FA 79 93 r1=r1 lsr 4; // right shift 8
000080FB 79 93 r1=r1 lsr 4;
000080FC 19 D3 1C 70 [P_SIO_Addr_Mid]=r1; // input SFLASH mid address
000080FE 04 92 R1 = [BP+4]; // Port direction
000080FF 47 B2 r1=r1&0x0007; // input SFLASH hi address
00008100 19 D3 1D 70 [P_SIO_Addr_High]=r1;
00008102 19 D3 1F 70 [P_SIO_Start]=r1; // enable write mode
00008104 05 92 R1 = [BP+5];
00008105 19 D3 1A 70 [P_SIO_Data]=r1; //start to transmit low byte
L_WaitSIOSendReadyLB:
00008107 11 93 1F 70 r1=[P_SIO_Start];
00008109 09 C3 80 00 test r1,0x0080
0000810B 45 4E jnz L_WaitSIOSendReadyLB
0000810C 40 F0 9E 81 call F_DelayPT // Delay necessary for the writing
0000810E 40 F0 9E 81 call F_DelayPT
00008110 40 F0 9E 81 call F_DelayPT
00008112 40 F0 9E 81 call F_DelayPT
00008114 40 F0 9E 81 call F_DelayPT
00008116 19 D3 20 70 [P_SIO_Stop]=r1; // disable write mode
00008118 03 92 R1 = [BP+3];
00008119 41 02 r1+=1;
0000811A 19 D3 1B 70 [P_SIO_Addr_Low]=r1; // input SFLASH low address
0000811C 19 D3 1F 70 [P_SIO_Start]=r1; //enable write mode
0000811E 05 92 r1=[BP+5];
0000811F 79 93 r1=r1 lsr 4; // right shift 8
00008120 79 93 r1=r1 lsr 4;
00008121 19 D3 1A 70 [P_SIO_Data]=r1; //start to transmit high byte
L_WaitSIOSendReadyHB:
00008123 11 93 1F 70 r1=[P_SIO_Start];
00008125 09 C3 80 00 test r1,0x0080
00008127 45 4E jnz L_WaitSIOSendReadyHB
00008128 40 F0 9E 81 call F_DelayPT
0000812A 40 F0 9E 81 call F_DelayPT
0000812C 40 F0 9E 81 call F_DelayPT
0000812E 40 F0 9E 81 call F_DelayPT
00008130 40 F0 9E 81 call F_DelayPT
00008132 19 D3 20 70 [P_SIO_Stop]=r1; //disable write mode
00008134 88 98 POP BP,BP FROM [SP];
00008135 90 9A retf;
.ENDP;
//////////////////////////////////////////////////////////////////
// Function: Read A Word from Serial Flash
// Syntax: SP_SIOReadAWord(AddressLow, AddressHigh)
// c level public
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