#define     T0MR1                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x1C))
#define     T0MR2                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x20))
#define     T0MR3                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x24))
#define     T0CCR                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x28))
#define     T0CR0                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x2C))
#define     T0CR1                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x30))
#define     T0CR2                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x34))
#define     T0CR3                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x38))
#define     T0EMR                   (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x3C))
#define     T0CTCR                  (*(volatile unsigned long *)(TMR0_BASE_ADDR + 0x70))

#define     TMR1_BASE_ADDR		    0xE0008000

#define     T1IR                    (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x00))
#define     T1TCR                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x04))
#define     T1TC                    (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x08))
#define     T1PR                    (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x0C))
#define     T1PC                    (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x10))
#define     T1MCR                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x14))
#define     T1MR0                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x18))
#define     T1MR1                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x1C))
#define     T1MR2                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x20))
#define     T1MR3                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x24))
#define     T1CCR                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x28))
#define     T1CR0                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x2C))
#define     T1CR1                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x30))
#define     T1CR2                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x34))
#define     T1CR3                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x38))
#define     T1EMR                   (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x3C))
#define     T1CTCR                  (*(volatile unsigned long *)(TMR1_BASE_ADDR + 0x70))

#define     TMR2_BASE_ADDR		    0xE0070000

#define     T2IR                    (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x00))
#define     T2TCR                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x04))
#define     T2TC                    (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x08))
#define     T2PR                    (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x0C))
#define     T2PC                    (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x10))
#define     T2MCR                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x14))
#define     T2MR0                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x18))
#define     T2MR1                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x1C))
#define     T2MR2                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x20))
#define     T2MR3                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x24))
#define     T2CCR                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x28))
#define     T2CR0                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x2C))
#define     T2CR1                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x30))
#define     T2CR2                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x34))
#define     T2CR3                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x38))
#define     T2EMR                   (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x3C))
#define     T2CTCR                  (*(volatile unsigned long *)(TMR2_BASE_ADDR + 0x70))

#define     TMR3_BASE_ADDR		    0xE0074000

#define     T3IR                    (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x00))
#define     T3TCR                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x04))
#define     T3TC                    (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x08))
#define     T3PR                    (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x0C))
#define     T3PC                    (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x10))
#define     T3MCR                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x14))
#define     T3MR0                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x18))
#define     T3MR1                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x1C))
#define     T3MR2                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x20))
#define     T3MR3                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x24))
#define     T3CCR                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x28))
#define     T3CR0                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x2C))
#define     T3CR1                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x30))
#define     T3CR2                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x34))
#define     T3CR3                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x38))
#define     T3EMR                   (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x3C))
#define     T3CTCR                  (*(volatile unsigned long *)(TMR3_BASE_ADDR + 0x70))


/*
#define     PWM0_BASE_ADDR		    0xE0014000
#define     PWM0IR                  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x00))
#define     PWM0TCR                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x04))
#define     PWM0TC                  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x08))
#define     PWM0PR                  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x0C))
#define     PWM0PC                  (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x10))
#define     PWM0MCR                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x14))
#define     PWM0MR0                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x18))
#define     PWM0MR1                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x1C))
#define     PWM0MR2                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x20))
#define     PWM0MR3                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x24))
#define     PWM0CCR                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x28))
#define     PWM0CR0                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x2C))
#define     PWM0CR1                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x30))
#define     PWM0CR2                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x34))
#define     PWM0CR3                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x38))
#define     PWM0EMR                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x3C))
#define     PWM0MR4                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x40))
#define     PWM0MR5                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x44))
#define     PWM0MR6                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x48))
#define     PWM0PCR                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x4C))
#define     PWM0LER                 (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x50))
#define     PWM0CTCR                (*(volatile unsigned long *)(PWM0_BASE_ADDR + 0x70))
*/
#define     PWM1_BASE_ADDR		    0xE0018000

#define     PWM1IR                  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x00))
#define     PWM1TCR                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x04))
#define     PWM1TC                  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x08))
#define     PWM1PR                  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x0C))
#define     PWM1PC                  (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x10))
#define     PWM1MCR                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x14))
#define     PWM1MR0                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x18))
#define     PWM1MR1                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x1C))
#define     PWM1MR2                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x20))
#define     PWM1MR3                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24))
#define     PWM1CCR                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28))
#define     PWM1CR0                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C))
#define     PWM1CR1                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30))
#define     PWM1CR2                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34))
#define     PWM1CR3                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38))
#define     PWM1EMR                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C))
#define     PWM1MR4                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40))
#define     PWM1MR5                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44))
#define     PWM1MR6                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48))
#define     PWM1PCR                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C))
#define     PWM1LER                 (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50))
#define     PWM1CTCR                (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70))

#define     UART0_BASE_ADDR		    0xE000C000

#define     U0RBR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define     U0THR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define     U0DLL                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define     U0DLM                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define     U0IER                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define     U0IIR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define     U0FCR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define     U0LCR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))

#define     U0LSR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
#define     U0SCR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
#define     U0ACR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))

#define     U0FDR                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
#define     U0TER                   (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))

#define     UART1_BASE_ADDR		    0xE0010000

#define     U1RBR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define     U1THR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define     U1DLL                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define     U1DLM                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define     U1IER                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define     U1IIR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define     U1FCR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define     U1LCR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
#define     U1MCR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
#define     U1LSR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
#define     U1MSR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
#define     U1SCR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
#define     U1ACR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))

#define     U1FDR                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
#define     U1TER                   (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))

#define     UART2_BASE_ADDR		    0xE0078000

#define     U2RBR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define     U2THR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define     U2DLL                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define     U2DLM                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04))
#define     U2IER                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04))
#define     U2IIR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08))
#define     U2FCR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08))
#define     U2LCR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C))

#define     U2LSR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14))
#define     U2SCR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C))
#define     U2ACR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20))

#define     U2FDR                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28))
#define     U2TER                   (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30))

#define     UART3_BASE_ADDR		    0xE007C000