//---------------------------------------------------------------------------
// Terawins Inc. Company Confidential Strictly Private
//
// $Archive: System.h $
// $Revision: 1.0 $
// $Author: JoannW $
// $Date: 2002/06/18 $
//
// --------------------------------------------------------------------------
// >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
// --------------------------------------------------------------------------
// Copyright 2002(c) Terawins Inc.
// This is an unpublished work.
// --------------------------------------------------------------------------

#if !defined(__SYSTEM_H__)
#define __SYSTEM_H__
//***************************************************************
//Test
#define DETECT_TIMER	0x1
//***************************************************************
#define DISPLAY_FUNC
#define T100
//#define TVP5150

/////////////////PANEL config
#ifdef T100

#define AU_7
//#define PA_7
//#define CPT_7
//#define LG_7_New
//#define PANASONIC_7
//#define PVI_7
//#define LG_7
#ifdef AU_7
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7D//0x3f//0x3f
//#define TIME_PROTOCOL 0x3D
/*#define UD_LR	0xf4
#define UD_RL	0xe0
#define DU_LR	0xbc
#define DU_RL	0x88//*/

#define GATE_PREDRIVE 0x03

#endif
#ifdef CPT_7
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7d
#define GATE_PREDRIVE 0x00
#endif

#ifdef LG_7_New
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x3f
#define GATE_PREDRIVE 0x03
#endif

#ifdef PA_7
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7d
#define GATE_PREDRIVE 0x05
#endif
#ifdef PANASONIC_7
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7F
#define OUT_PIN_CONF  0xF4
#define GATE_PREDRIVE 0x05
#define UD_LR	0xb4
#define UD_RL	0x20
#define DU_LR	0xfc
#define DU_RL	0xc8
#endif

#ifdef PVI_7
#define KVGA
#define TCON
#define ROTATE
#define TIME_PROTOCOL 0x7F
#define OUT_PIN_CONF  0xB0
#define GATE_PREDRIVE 0x03
#endif

#ifdef LG_7
#define KVGA
#define TCON
#define TIME_PROTOCOL 0x7F
#define OUT_PIN_CONF  0xEC
#define GATE_PREDRIVE 0x03
#endif

#else

#define INCH10_2
//#define INCH_17
//#define AU_12
#define T515
#ifdef INCH10_2
#define WVGA
#define TCON
#define ROTATE
#endif

#ifdef AU_12
#define WXGA
#endif

#ifdef INCH_17
#define WXGA
#endif

#define TV
	#define PAL
//	#define NTSC
#define PAL_I  0x0e
#define PAL_DK 0x0f


#endif
/////////////////////////////////
//#define component


//***************************************************************
//Test
//***************************************************************
#define DELAY_LINES  4
//***************************************************************
//Source
//***************************************************************
typedef enum{
	isrcCVIDEO2=0x01,
	isrcCVIDEO3,
	isrcCVIDEO4,
	isrcSVIDEO,
#ifdef component
    isrcCOMPONENT,
#endif

#ifdef T515
    isrc_T515_CVIDEO1,
    isrc_T515_CVIDEO2,
	isrc_T515_SVIDEO,
#endif
#ifdef TVP5150
    isrc_5150_CVIDEO1,
#endif
    isrc_end,
	isrcTV
}VIDEOINPUT;
//***************************************************************
//define Port
//***************************************************************

sbit 	BKLIGHT_EN		= P0^7;

sbit	AUDIO_MUTE		= P1^3;
sbit	CHIP_RESET      = P1^4;
sbit 	VIDEO_RESET		= P1^5;//P0^2; //P1^3;

sbit 	LED_GREEN		= P2^6;
sbit 	LED_RED		    = P2^7;
sbit    LEFT_RIGHT      = P0^5;
sbit    UP_DOWN			= P0^6;
/************************************
         System
************************************/
#define TIMER0
#define INTERRUPT1
#define TIMER1

#define XCLK			27000000

#ifdef KVGA
#define DFDIV_40		21//21//27	 	//40MHz 0xC8

#define DIDIV			2//3    	//0xC9
#define DODIV			3//3    	//0xCA
#endif

#ifdef WVGA
#define DFDIV_40		47	 	//40MHz

#define DIDIV			2    	//0xC9
#define DODIV			2    	//0xCA
#endif

#ifdef WXGA
#ifdef AU_12
#define DFDIV_40		42	 	//40MHz
#else
#define DFDIV_40		46	 	//40MHz
#endif
#define DIDIV			2    	//0xC9
#define DODIV			1    	//0xCA
#endif

#define DRDIV			(1<<(DODIV+1))
#define DNDIV_40		((float)(DFDIV_40+2)/(DIDIV+2)/DRDIV)


#define BACKLIGHT
#define POWER_ON_SEQUENCE

#define NVRAM

/************************************
         Display
************************************/
//#define TCON
//#define ROTATE
//#define RSDS
//#define AUDIO_AVAILABLE
//#define INTERLACED
//#define TMDS

#ifdef AUDIO_AVAILABLE
	#define VPWME	0x10
	#define PVOL_BGHS_SEL	0x04
#else
	#define VPWME	0x00
	#define PVOL_BGHS_SEL 	0x00
#endif

#ifdef TMDS
	#define TMDS_LOW		39000000
	#define TMDS_HIGH       80000000
#endif

//#define	TCONPOWER			1 //this if for chip bug May.08
#ifdef TCON
  	#define	TCONPOWER		1
	#define TCON_GO_SYNC 	1
#else
  	#define	TCONPOWER		0
	#define TCON_GO_SYNC 	0
#endif


#define DIGITAL_BRIGHT
#define DIGITAL_CONTRAST

#define GAMMA_EN
#ifdef GAMMA_EN
//	#define GAMMAR_ONLY
//	#define GAMMAG_ONLY
//	#define GAMMAB_ONLY
	#define GAMMARGB_TOGETHER
#endif

#define FAILSAFE_EN
#ifdef FAILSAFE_EN
	#define VSYNC_MAX		85
#endif

//#define INTERLACED
/************************************
         Input Source
************************************/
#define VIDEO_AVAILABLE				1
#define TV_AVAILABLE				1
/************************************
         Software Config
************************************/
#define FAILSAFE_ADJ_EN
	#define FAILSAFE_ADJ_POS 		0x01
	#define FAILSAFE_ADJ_FREQ		0x02
	#define FAILSAFE_ADJ_PHASE		0x04
#define SUBSAMPLE_ADJ_EN
	#define SUBSAMPLE_ADJ_POS		0x01
	#define SUBSAMPLE_ADJ_FREQ		0x02
	#define SUBSAMPLE_ADJ_PHASE		0x04
#define DUBLESAMPLE_ADJ_EN
	#define DUBLESAMPLE_ADJ_POS		0x01
	#define DUBLESAMPLE_ADJ_FREQ	0x02
	#define DUBLESAMPLE_ADJ_PHASE	0x04
//#define DOSMODE_ADJ_EN
	#define DOSMODE_ADJ_POS			0x01
	#define DOSMODE_ADJ_FREQ      	0x02
	#define DOSMODE_ADJ_PHASE      	0x04

#define	GM_RGB_ALL_SAME
#define ADJ_DIGITAL				1
#define ADJ_ADC					0

//Ruby add 2005-06-07
typedef enum{
 ScaleFULL = 0x00,
 Scale4_3        ,
#ifdef T515
 Scale1_1        ,
#endif
 ScaleEnd        ,
 Scale16_9
}Scale_Type;

#ifdef KVGA
#define H_Size    480 //0xdc 0xdd  //0xb4 0xb5  //0xdc 0xdd
#define V_Size    236 //0xde 0xdf  //0xb6 0xb7  //0xde 0xdf
#define MV_Size   235 //0xde 0xdf  //0xb6 0xb7  //0xde 0xdf
#define H_Size43  360
#endif

#ifdef WVGA
#define H_Size    800
#define V_Size    480
#define H_Size43  700
#endif

#ifdef WXGA
#define H_Size    0x0500 //0xdc 0xdd  //0xb4 0xb5  //0xdc 0xdd
    #ifdef AU_12
		#define V_Size  0x0320 //0xde 0xdf  //0xb6 0xb7  //0xde 0xdf
    #else
		#define V_Size  0x02ff //0xde 0xdf  //0xb6 0xb7  //0xde 0xdf
    #endif
#define H_Size43  0x0500
#endif



#endif // __SYSTEM_H__