?? uart2.lis
字號:
.module uart2.c
.area text(rom, con, rel)
0000 .dbfile C:\work\UART_MEGA128\uart2.c
0000 .dbfunc e uart0_init _uart0_init fV
.even
0000 _uart0_init::
0000 .dbline -1
0000 .dbline 16
0000 ; #include<iom128v.h>
0000 ; #include<macros.h>
0000 ; #define com0
0000 ; #define fosc 4000000 //晶振4MHZ
0000 ; #define baud 2400 //波特率
0000 ; #define RXC_BUFF_SIZE 64
0000 ; #define TXC_BUFF_SIZE 64
0000 ; unsigned char RXC_BUFF[RXC_BUFF_SIZE];
0000 ; unsigned char TXC_BUFF[TXC_BUFF_SIZE];
0000 ; unsigned char RXC_RD;//接受緩沖區讀指針
0000 ; unsigned char RXC_WR;//接受緩沖區寫指針
0000 ; unsigned char TXC_RD;//發送緩沖區讀指針
0000 ; unsigned char TXC_WR;//發送緩沖區寫指針
0000 ; #ifdef com0
0000 ; void uart0_init(void)
0000 ; {
0000 .dbline 17
0000 ; UCSR0B = 0x00; //disable while setting baud rate
0000 2224 clr R2
0002 2AB8 out 0xa,R2
0004 .dbline 18
0004 ; UCSR0A = 0x00;
0004 2BB8 out 0xb,R2
0006 .dbline 19
0006 ; UCSR0C =(1<<UCSZ01)|(1<<UCSZ00);//8bit+1bit stop
0006 86E0 ldi R24,6
0008 80939500 sts 149,R24
000C .dbline 20
000C ; UBRR0L=(fosc/16/(baud+1))%256;
000C 88E6 ldi R24,104
000E 89B9 out 0x9,R24
0010 .dbline 21
0010 ; UBRR0H=(fosc/16/(baud+1))/256;
0010 20929000 sts 144,R2
0014 .dbline 22
0014 ; UCSR0B =(1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);//RXCEN TXCEN RXCIE
0014 88E9 ldi R24,152
0016 8AB9 out 0xa,R24
0018 .dbline -2
0018 .dbline 23
0018 ; }
0018 L1:
0018 .dbline 0 ; func end
0018 0895 ret
001A .dbend
001A .dbfunc e putchar _putchar fV
001A ; c -> R16
.even
001A _putchar::
001A .dbline -1
001A .dbline 36
001A ; #else
001A ; void uart1_init(void)
001A ; {
001A ; UCSR1B = 0x00; //disable while setting baud rate
001A ; UCSR1A = 0x00;
001A ; UCSR1C = (1<<UCSZ11)|(1<<UCSZ10);//8bit+1bit stop
001A ; UBRR1L=(fosc/16/(baud+1))%256;
001A ; UBRR1H=(fosc/16/(baud+1))/256;
001A ; UCSR1B =(1<<RXEN1)|(1<<TXEN1)|(1<<RXCIE1);//RXCEN TXCEN RXCIE
001A ; }
001A ; #endif
001A ; void putchar(unsigned char c)
001A ; {
001A .dbline 37
001A ; TXC_BUFF[TXC_WR]=c;
001A 80E0 ldi R24,<_TXC_BUFF
001C 90E0 ldi R25,>_TXC_BUFF
001E E0910000 lds R30,_TXC_WR
0022 FF27 clr R31
0024 E80F add R30,R24
0026 F91F adc R31,R25
0028 0083 std z+0,R16
002A .dbline 38
002A ; if(TXC_WR<(TXC_BUFF_SIZE-1))
002A 80910000 lds R24,_TXC_WR
002E 8F33 cpi R24,63
0030 20F4 brsh L3
0032 .dbline 39
0032 ; TXC_WR++;
0032 8F5F subi R24,255 ; addi 1
0034 80930000 sts _TXC_WR,R24
0038 03C0 xjmp L4
003A L3:
003A .dbline 41
003A ; else
003A ; TXC_WR=0;
003A 2224 clr R2
003C 20920000 sts _TXC_WR,R2
0040 L4:
0040 .dbline 43
0040 ; #ifdef com0
0040 ; UCSR0B|=(1<<UDRIE0);//開啟UDRE中斷
0040 559A sbi 0xa,5
0042 .dbline -2
0042 .dbline 47
0042 ; #else
0042 ; UCSR1B|=(1<<UDRIE1);
0042 ; #endif
0042 ; }
0042 L2:
0042 .dbline 0 ; func end
0042 0895 ret
0044 .dbsym r c 16 c
0044 .dbend
0044 .dbfunc e getchar _getchar fc
0044 ; temp -> R16,R17
.even
0044 _getchar::
0044 .dbline -1
0044 .dbline 49
0044 ; unsigned char getchar(void)
0044 ; {
0044 L6:
0044 .dbline 52
0044 L7:
0044 .dbline 51
0044 ; unsigned temp;
0044 ; while(RXC_RD==RXC_WR)
0044 20900200 lds R2,_RXC_WR
0048 30900300 lds R3,_RXC_RD
004C 3214 cp R3,R2
004E D1F3 breq L6
0050 .dbline 53
0050 ; ;
0050 ; temp=RXC_BUFF[RXC_RD];
0050 80E0 ldi R24,<_RXC_BUFF
0052 90E0 ldi R25,>_RXC_BUFF
0054 E32D mov R30,R3
0056 FF27 clr R31
0058 E80F add R30,R24
005A F91F adc R31,R25
005C 0081 ldd R16,z+0
005E 1127 clr R17
0060 .dbline 54
0060 ; if(RXC_RD<(RXC_BUFF_SIZE-1))
0060 832D mov R24,R3
0062 8F33 cpi R24,63
0064 20F4 brsh L9
0066 .dbline 55
0066 ; RXC_RD++;
0066 8F5F subi R24,255 ; addi 1
0068 80930300 sts _RXC_RD,R24
006C 03C0 xjmp L10
006E L9:
006E .dbline 57
006E ; else
006E ; RXC_RD=0;
006E 2224 clr R2
0070 20920300 sts _RXC_RD,R2
0074 L10:
0074 .dbline 58
0074 ; return temp;
0074 .dbline -2
0074 L5:
0074 .dbline 0 ; func end
0074 0895 ret
0076 .dbsym r temp 16 i
0076 .dbend
0076 .dbfunc e puts _puts fV
0076 ; s -> R20,R21
.even
0076 _puts::
0076 0E940000 xcall push_gset1
007A A801 movw R20,R16
007C .dbline -1
007C .dbline 61
007C ; }
007C ; void puts(char *s)
007C ; {
007C 05C0 xjmp L13
007E L12:
007E .dbline 63
007E .dbline 64
007E FA01 movw R30,R20
0080 0081 ldd R16,z+0
0082 CBDF xcall _putchar
0084 .dbline 65
0084 4F5F subi R20,255 ; offset = 1
0086 5F4F sbci R21,255
0088 .dbline 66
0088 L13:
0088 .dbline 62
0088 ; while (*s)
0088 FA01 movw R30,R20
008A 2080 ldd R2,z+0
008C 2220 tst R2
008E B9F7 brne L12
0090 .dbline 67
0090 ; {
0090 ; putchar(*s);
0090 ; s++;
0090 ; }
0090 ; putchar(0x0a);
0090 0AE0 ldi R16,10
0092 C3DF xcall _putchar
0094 .dbline 68
0094 ; putchar(0x0d);
0094 0DE0 ldi R16,13
0096 C1DF xcall _putchar
0098 .dbline -2
0098 .dbline 69
0098 ; }
0098 L11:
0098 0E940000 xcall pop_gset1
009C .dbline 0 ; func end
009C 0895 ret
009E .dbsym r s 20 pc
009E .dbend
009E .dbfunc e init_devices _init_devices fV
.even
009E _init_devices::
009E .dbline -1
009E .dbline 71
009E ; void init_devices(void)
009E ; {
009E .dbline 73
009E ; //stop errant interrupts until set up
009E ; CLI(); //disable all interrupts
009E F894 cli
00A0 .dbline 74
00A0 ; XDIV = 0x00; //xtal divider
00A0 2224 clr R2
00A2 2CBE out 0x3c,R2
00A4 .dbline 75
00A4 ; XMCRA = 0x00; //external memory
00A4 20926D00 sts 109,R2
00A8 .dbline 76
00A8 ; MCUCR = 0x00;
00A8 25BE out 0x35,R2
00AA .dbline 77
00AA ; EICRA = 0x00; //extended ext ints
00AA 20926A00 sts 106,R2
00AE .dbline 78
00AE ; EICRB = 0x00; //extended ext ints
00AE 2ABE out 0x3a,R2
00B0 .dbline 79
00B0 ; EIMSK = 0x00;
00B0 29BE out 0x39,R2
00B2 .dbline 80
00B2 ; TIMSK = 0x00; //timer interrupt sources
00B2 27BE out 0x37,R2
00B4 .dbline 81
00B4 ; ETIMSK = 0x00; //extended timer interrupt sources
00B4 20927D00 sts 125,R2
00B8 .dbline -2
00B8 .dbline 83
00B8 ; //all peripherals are now initialised
00B8 ; }
00B8 L15:
00B8 .dbline 0 ; func end
00B8 0895 ret
00BA .dbend
00BA .dbfunc e main _main fV
00BA ; i -> R20
.even
00BA _main::
00BA .dbline -1
00BA .dbline 85
00BA ; void main(void)
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