?? uart2.lis
字號:
00BA ; {
00BA .dbline 87
00BA ; unsigned char i;
00BA ; TXC_RD=0;
00BA 2224 clr R2
00BC 20920100 sts _TXC_RD,R2
00C0 .dbline 88
00C0 ; TXC_WR=0;
00C0 20920000 sts _TXC_WR,R2
00C4 .dbline 89
00C4 ; RXC_RD=0;
00C4 20920300 sts _RXC_RD,R2
00C8 .dbline 90
00C8 ; RXC_WR=0;
00C8 20920200 sts _RXC_WR,R2
00CC .dbline 91
00CC ; init_devices();
00CC E8DF xcall _init_devices
00CE .dbline 93
00CE ; #ifdef com0
00CE ; uart0_init();
00CE 98DF xcall _uart0_init
00D0 .dbline 97
00D0 ; #else
00D0 ; uart1_init();
00D0 ; #endif
00D0 ; SEI();
00D0 7894 sei
00D2 .dbline 98
00D2 ; puts("HELLO!");
00D2 00E0 ldi R16,<L17
00D4 10E0 ldi R17,>L17
00D6 CFDF xcall _puts
00D8 12C0 xjmp L19
00DA L18:
00DA .dbline 100
00DA ; while(1)
00DA ; {
00DA .dbline 101
00DA ; if (getchar()=='t')//按鍵盤t鍵開始測試
00DA B4DF xcall _getchar
00DC 0437 cpi R16,116
00DE 79F4 brne L21
00E0 .dbline 102
00E0 ; {
00E0 .dbline 103
00E0 ; puts("test ok!");
00E0 00E0 ldi R16,<L23
00E2 10E0 ldi R17,>L23
00E4 C8DF xcall _puts
00E6 .dbline 104
00E6 ; for (i=0;i<10;i++)
00E6 4427 clr R20
00E8 04C0 xjmp L27
00EA L24:
00EA .dbline 105
00EA .dbline 106
00EA 042F mov R16,R20
00EC 005D subi R16,208 ; addi 48
00EE 95DF xcall _putchar
00F0 .dbline 107
00F0 L25:
00F0 .dbline 104
00F0 4395 inc R20
00F2 L27:
00F2 .dbline 104
00F2 4A30 cpi R20,10
00F4 D0F3 brlo L24
00F6 .dbline 108
00F6 ; {
00F6 ; putchar(0x30+i);
00F6 ; }
00F6 ; putchar(0x0a);
00F6 0AE0 ldi R16,10
00F8 90DF xcall _putchar
00FA .dbline 109
00FA ; putchar(0x0d);
00FA 0DE0 ldi R16,13
00FC 8EDF xcall _putchar
00FE .dbline 110
00FE ; }
00FE L21:
00FE .dbline 111
00FE L19:
00FE .dbline 99
00FE EDCF xjmp L18
0100 X0:
0100 .dbline -2
0100 .dbline 112
0100 ; }
0100 ; }
0100 L16:
0100 .dbline 0 ; func end
0100 0895 ret
0102 .dbsym r i 20 c
0102 .dbend
.area vector(rom, abs)
.org 72
0048 0C948100 jmp _uart0_rx_isr
.area text(rom, con, rel)
0102 .dbfile C:\work\UART_MEGA128\uart2.c
0102 .dbfunc e uart0_rx_isr _uart0_rx_isr fV
.even
0102 _uart0_rx_isr::
0102 2A92 st -y,R2
0104 8A93 st -y,R24
0106 9A93 st -y,R25
0108 EA93 st -y,R30
010A FA93 st -y,R31
010C 2FB6 in R2,0x3f
010E 2A92 st -y,R2
0110 .dbline -1
0110 .dbline 117
0110 ; //中斷例程
0110 ; #ifdef com0
0110 ; #pragma interrupt_handler uart0_rx_isr:iv_USART0_RXC
0110 ; void uart0_rx_isr(void)
0110 ; {
0110 .dbline 118
0110 ; RXC_BUFF[RXC_WR]=UDR0;
0110 80E0 ldi R24,<_RXC_BUFF
0112 90E0 ldi R25,>_RXC_BUFF
0114 E0910200 lds R30,_RXC_WR
0118 FF27 clr R31
011A E80F add R30,R24
011C F91F adc R31,R25
011E 2CB0 in R2,0xc
0120 2082 std z+0,R2
0122 .dbline 119
0122 ; if(RXC_WR<(RXC_BUFF_SIZE-1))
0122 80910200 lds R24,_RXC_WR
0126 8F33 cpi R24,63
0128 20F4 brsh L29
012A .dbline 120
012A ; RXC_WR++;
012A 8F5F subi R24,255 ; addi 1
012C 80930200 sts _RXC_WR,R24
0130 03C0 xjmp L30
0132 L29:
0132 .dbline 122
0132 2224 clr R2
0134 20920200 sts _RXC_WR,R2
0138 L30:
0138 .dbline -2
0138 .dbline 123
0138 ; else
0138 ; RXC_WR=0; //uart has received a character in UDR
0138 ; }
0138 L28:
0138 2990 ld R2,y+
013A 2FBE out 0x3f,R2
013C F991 ld R31,y+
013E E991 ld R30,y+
0140 9991 ld R25,y+
0142 8991 ld R24,y+
0144 2990 ld R2,y+
0146 .dbline 0 ; func end
0146 1895 reti
0148 .dbend
.area vector(rom, abs)
.org 76
004C 0C94A400 jmp _uart0_udre_isr
.area text(rom, con, rel)
0148 .dbfile C:\work\UART_MEGA128\uart2.c
0148 .dbfunc e uart0_udre_isr _uart0_udre_isr fV
.even
0148 _uart0_udre_isr::
0148 2A92 st -y,R2
014A 3A92 st -y,R3
014C 8A93 st -y,R24
014E 9A93 st -y,R25
0150 EA93 st -y,R30
0152 FA93 st -y,R31
0154 2FB6 in R2,0x3f
0156 2A92 st -y,R2
0158 .dbline -1
0158 .dbline 126
0158 ; #pragma interrupt_handler uart0_udre_isr:iv_USART0_UDRE
0158 ; void uart0_udre_isr(void)
0158 ; {
0158 .dbline 127
0158 ; UDR0=TXC_BUFF[TXC_RD];//character transferred to shift register so UDR is now empty
0158 80E0 ldi R24,<_TXC_BUFF
015A 90E0 ldi R25,>_TXC_BUFF
015C E0910100 lds R30,_TXC_RD
0160 FF27 clr R31
0162 E80F add R30,R24
0164 F91F adc R31,R25
0166 2080 ldd R2,z+0
0168 2CB8 out 0xc,R2
016A .dbline 128
016A ; if(TXC_RD<(TXC_BUFF_SIZE-1))
016A 80910100 lds R24,_TXC_RD
016E 8F33 cpi R24,63
0170 20F4 brsh L32
0172 .dbline 129
0172 ; TXC_RD++;
0172 8F5F subi R24,255 ; addi 1
0174 80930100 sts _TXC_RD,R24
0178 03C0 xjmp L33
017A L32:
017A .dbline 131
017A ; else
017A ; TXC_RD=0;
017A 2224 clr R2
017C 20920100 sts _TXC_RD,R2
0180 L33:
0180 .dbline 132
0180 20900000 lds R2,_TXC_WR
0184 30900100 lds R3,_TXC_RD
0188 3214 cp R3,R2
018A 09F4 brne L34
018C .dbline 133
018C 5598 cbi 0xa,5
018E L34:
018E .dbline -2
018E .dbline 134
018E ; if(TXC_RD==TXC_WR)
018E ; UCSR0B&=~(1<<UDRIE0);
018E ; }
018E L31:
018E 2990 ld R2,y+
0190 2FBE out 0x3f,R2
0192 F991 ld R31,y+
0194 E991 ld R30,y+
0196 9991 ld R25,y+
0198 8991 ld R24,y+
019A 3990 ld R3,y+
019C 2990 ld R2,y+
019E .dbline 0 ; func end
019E 1895 reti
01A0 .dbend
.area bss(ram, con, rel)
0000 .dbfile C:\work\UART_MEGA128\uart2.c
0000 _TXC_WR::
0000 .blkb 1
0001 .dbsym e TXC_WR _TXC_WR c
0001 _TXC_RD::
0001 .blkb 1
0002 .dbsym e TXC_RD _TXC_RD c
0002 _RXC_WR::
0002 .blkb 1
0003 .dbsym e RXC_WR _RXC_WR c
0003 _RXC_RD::
0003 .blkb 1
0004 .dbsym e RXC_RD _RXC_RD c
0004 _TXC_BUFF::
0004 .blkb 64
0044 .dbsym e TXC_BUFF _TXC_BUFF A[64:64]c
0044 _RXC_BUFF::
0044 .blkb 64
0084 .dbsym e RXC_BUFF _RXC_BUFF A[64:64]c
.area data(ram, con, rel)
0000 .dbfile C:\work\UART_MEGA128\uart2.c
0000 L23:
0000 .blkb 9
.area idata
0000 74657374206F6B2100 .byte 't,'e,'s,'t,32,'o,'k,33,0
.area data(ram, con, rel)
0009 .dbfile C:\work\UART_MEGA128\uart2.c
0009 L17:
0009 .blkb 7
.area idata
0009 48454C4C4F2100 .byte 'H,'E,'L,'L,'O,33,0
.area data(ram, con, rel)
0010 .dbfile C:\work\UART_MEGA128\uart2.c
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