?? uart2.s
字號(hào):
.module uart2.c
.area text(rom, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
.dbfunc e uart0_init _uart0_init fV
.even
_uart0_init::
.dbline -1
.dbline 16
; #include<iom128v.h>
; #include<macros.h>
; #define com0
; #define fosc 4000000 //晶振4MHZ
; #define baud 2400 //波特率
; #define RXC_BUFF_SIZE 64
; #define TXC_BUFF_SIZE 64
; unsigned char RXC_BUFF[RXC_BUFF_SIZE];
; unsigned char TXC_BUFF[TXC_BUFF_SIZE];
; unsigned char RXC_RD;//接受緩沖區(qū)讀指針
; unsigned char RXC_WR;//接受緩沖區(qū)寫指針
; unsigned char TXC_RD;//發(fā)送緩沖區(qū)讀指針
; unsigned char TXC_WR;//發(fā)送緩沖區(qū)寫指針
; #ifdef com0
; void uart0_init(void)
; {
.dbline 17
; UCSR0B = 0x00; //disable while setting baud rate
clr R2
out 0xa,R2
.dbline 18
; UCSR0A = 0x00;
out 0xb,R2
.dbline 19
; UCSR0C =(1<<UCSZ01)|(1<<UCSZ00);//8bit+1bit stop
ldi R24,6
sts 149,R24
.dbline 20
; UBRR0L=(fosc/16/(baud+1))%256;
ldi R24,104
out 0x9,R24
.dbline 21
; UBRR0H=(fosc/16/(baud+1))/256;
sts 144,R2
.dbline 22
; UCSR0B =(1<<RXEN0)|(1<<TXEN0)|(1<<RXCIE0);//RXCEN TXCEN RXCIE
ldi R24,152
out 0xa,R24
.dbline -2
.dbline 23
; }
L1:
.dbline 0 ; func end
ret
.dbend
.dbfunc e putchar _putchar fV
; c -> R16
.even
_putchar::
.dbline -1
.dbline 36
; #else
; void uart1_init(void)
; {
; UCSR1B = 0x00; //disable while setting baud rate
; UCSR1A = 0x00;
; UCSR1C = (1<<UCSZ11)|(1<<UCSZ10);//8bit+1bit stop
; UBRR1L=(fosc/16/(baud+1))%256;
; UBRR1H=(fosc/16/(baud+1))/256;
; UCSR1B =(1<<RXEN1)|(1<<TXEN1)|(1<<RXCIE1);//RXCEN TXCEN RXCIE
; }
; #endif
; void putchar(unsigned char c)
; {
.dbline 37
; TXC_BUFF[TXC_WR]=c;
ldi R24,<_TXC_BUFF
ldi R25,>_TXC_BUFF
lds R30,_TXC_WR
clr R31
add R30,R24
adc R31,R25
std z+0,R16
.dbline 38
; if(TXC_WR<(TXC_BUFF_SIZE-1))
lds R24,_TXC_WR
cpi R24,63
brsh L3
.dbline 39
; TXC_WR++;
subi R24,255 ; addi 1
sts _TXC_WR,R24
xjmp L4
L3:
.dbline 41
; else
; TXC_WR=0;
clr R2
sts _TXC_WR,R2
L4:
.dbline 43
; #ifdef com0
; UCSR0B|=(1<<UDRIE0);//開啟UDRE中斷
sbi 0xa,5
.dbline -2
.dbline 47
; #else
; UCSR1B|=(1<<UDRIE1);
; #endif
; }
L2:
.dbline 0 ; func end
ret
.dbsym r c 16 c
.dbend
.dbfunc e getchar _getchar fc
; temp -> R16,R17
.even
_getchar::
.dbline -1
.dbline 49
; unsigned char getchar(void)
; {
L6:
.dbline 52
L7:
.dbline 51
; unsigned temp;
; while(RXC_RD==RXC_WR)
lds R2,_RXC_WR
lds R3,_RXC_RD
cp R3,R2
breq L6
.dbline 53
; ;
; temp=RXC_BUFF[RXC_RD];
ldi R24,<_RXC_BUFF
ldi R25,>_RXC_BUFF
mov R30,R3
clr R31
add R30,R24
adc R31,R25
ldd R16,z+0
clr R17
.dbline 54
; if(RXC_RD<(RXC_BUFF_SIZE-1))
mov R24,R3
cpi R24,63
brsh L9
.dbline 55
; RXC_RD++;
subi R24,255 ; addi 1
sts _RXC_RD,R24
xjmp L10
L9:
.dbline 57
; else
; RXC_RD=0;
clr R2
sts _RXC_RD,R2
L10:
.dbline 58
; return temp;
.dbline -2
L5:
.dbline 0 ; func end
ret
.dbsym r temp 16 i
.dbend
.dbfunc e puts _puts fV
; s -> R20,R21
.even
_puts::
xcall push_gset1
movw R20,R16
.dbline -1
.dbline 61
; }
; void puts(char *s)
; {
xjmp L13
L12:
.dbline 63
.dbline 64
movw R30,R20
ldd R16,z+0
xcall _putchar
.dbline 65
subi R20,255 ; offset = 1
sbci R21,255
.dbline 66
L13:
.dbline 62
; while (*s)
movw R30,R20
ldd R2,z+0
tst R2
brne L12
.dbline 67
; {
; putchar(*s);
; s++;
; }
; putchar(0x0a);
ldi R16,10
xcall _putchar
.dbline 68
; putchar(0x0d);
ldi R16,13
xcall _putchar
.dbline -2
.dbline 69
; }
L11:
xcall pop_gset1
.dbline 0 ; func end
ret
.dbsym r s 20 pc
.dbend
.dbfunc e init_devices _init_devices fV
.even
_init_devices::
.dbline -1
.dbline 71
; void init_devices(void)
; {
.dbline 73
; //stop errant interrupts until set up
; CLI(); //disable all interrupts
cli
.dbline 74
; XDIV = 0x00; //xtal divider
clr R2
out 0x3c,R2
.dbline 75
; XMCRA = 0x00; //external memory
sts 109,R2
.dbline 76
; MCUCR = 0x00;
out 0x35,R2
.dbline 77
; EICRA = 0x00; //extended ext ints
sts 106,R2
.dbline 78
; EICRB = 0x00; //extended ext ints
out 0x3a,R2
.dbline 79
; EIMSK = 0x00;
out 0x39,R2
.dbline 80
; TIMSK = 0x00; //timer interrupt sources
out 0x37,R2
.dbline 81
; ETIMSK = 0x00; //extended timer interrupt sources
sts 125,R2
.dbline -2
.dbline 83
; //all peripherals are now initialised
; }
L15:
.dbline 0 ; func end
ret
.dbend
.dbfunc e main _main fV
; i -> R20
.even
_main::
.dbline -1
.dbline 85
; void main(void)
; {
.dbline 87
; unsigned char i;
; TXC_RD=0;
clr R2
sts _TXC_RD,R2
.dbline 88
; TXC_WR=0;
sts _TXC_WR,R2
.dbline 89
; RXC_RD=0;
sts _RXC_RD,R2
.dbline 90
; RXC_WR=0;
sts _RXC_WR,R2
.dbline 91
; init_devices();
xcall _init_devices
.dbline 93
; #ifdef com0
; uart0_init();
xcall _uart0_init
.dbline 97
; #else
; uart1_init();
; #endif
; SEI();
sei
.dbline 98
; puts("HELLO!");
ldi R16,<L17
ldi R17,>L17
xcall _puts
xjmp L19
L18:
.dbline 100
; while(1)
; {
.dbline 101
; if (getchar()=='t')//按鍵盤t鍵開始測(cè)試
xcall _getchar
cpi R16,116
brne L21
.dbline 102
; {
.dbline 103
; puts("test ok!");
ldi R16,<L23
ldi R17,>L23
xcall _puts
.dbline 104
; for (i=0;i<10;i++)
clr R20
xjmp L27
L24:
.dbline 105
.dbline 106
mov R16,R20
subi R16,208 ; addi 48
xcall _putchar
.dbline 107
L25:
.dbline 104
inc R20
L27:
.dbline 104
cpi R20,10
brlo L24
.dbline 108
; {
; putchar(0x30+i);
; }
; putchar(0x0a);
ldi R16,10
xcall _putchar
.dbline 109
; putchar(0x0d);
ldi R16,13
xcall _putchar
.dbline 110
; }
L21:
.dbline 111
L19:
.dbline 99
xjmp L18
X0:
.dbline -2
.dbline 112
; }
; }
L16:
.dbline 0 ; func end
ret
.dbsym r i 20 c
.dbend
.area vector(rom, abs)
.org 72
jmp _uart0_rx_isr
.area text(rom, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
.dbfunc e uart0_rx_isr _uart0_rx_isr fV
.even
_uart0_rx_isr::
st -y,R2
st -y,R24
st -y,R25
st -y,R30
st -y,R31
in R2,0x3f
st -y,R2
.dbline -1
.dbline 117
; //中斷例程
; #ifdef com0
; #pragma interrupt_handler uart0_rx_isr:iv_USART0_RXC
; void uart0_rx_isr(void)
; {
.dbline 118
; RXC_BUFF[RXC_WR]=UDR0;
ldi R24,<_RXC_BUFF
ldi R25,>_RXC_BUFF
lds R30,_RXC_WR
clr R31
add R30,R24
adc R31,R25
in R2,0xc
std z+0,R2
.dbline 119
; if(RXC_WR<(RXC_BUFF_SIZE-1))
lds R24,_RXC_WR
cpi R24,63
brsh L29
.dbline 120
; RXC_WR++;
subi R24,255 ; addi 1
sts _RXC_WR,R24
xjmp L30
L29:
.dbline 122
clr R2
sts _RXC_WR,R2
L30:
.dbline -2
.dbline 123
; else
; RXC_WR=0; //uart has received a character in UDR
; }
L28:
ld R2,y+
out 0x3f,R2
ld R31,y+
ld R30,y+
ld R25,y+
ld R24,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbend
.area vector(rom, abs)
.org 76
jmp _uart0_udre_isr
.area text(rom, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
.dbfunc e uart0_udre_isr _uart0_udre_isr fV
.even
_uart0_udre_isr::
st -y,R2
st -y,R3
st -y,R24
st -y,R25
st -y,R30
st -y,R31
in R2,0x3f
st -y,R2
.dbline -1
.dbline 126
; #pragma interrupt_handler uart0_udre_isr:iv_USART0_UDRE
; void uart0_udre_isr(void)
; {
.dbline 127
; UDR0=TXC_BUFF[TXC_RD];//character transferred to shift register so UDR is now empty
ldi R24,<_TXC_BUFF
ldi R25,>_TXC_BUFF
lds R30,_TXC_RD
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
out 0xc,R2
.dbline 128
; if(TXC_RD<(TXC_BUFF_SIZE-1))
lds R24,_TXC_RD
cpi R24,63
brsh L32
.dbline 129
; TXC_RD++;
subi R24,255 ; addi 1
sts _TXC_RD,R24
xjmp L33
L32:
.dbline 131
; else
; TXC_RD=0;
clr R2
sts _TXC_RD,R2
L33:
.dbline 132
lds R2,_TXC_WR
lds R3,_TXC_RD
cp R3,R2
brne L34
.dbline 133
cbi 0xa,5
L34:
.dbline -2
.dbline 134
; if(TXC_RD==TXC_WR)
; UCSR0B&=~(1<<UDRIE0);
; }
L31:
ld R2,y+
out 0x3f,R2
ld R31,y+
ld R30,y+
ld R25,y+
ld R24,y+
ld R3,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbend
.area bss(ram, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
_TXC_WR::
.blkb 1
.dbsym e TXC_WR _TXC_WR c
_TXC_RD::
.blkb 1
.dbsym e TXC_RD _TXC_RD c
_RXC_WR::
.blkb 1
.dbsym e RXC_WR _RXC_WR c
_RXC_RD::
.blkb 1
.dbsym e RXC_RD _RXC_RD c
_TXC_BUFF::
.blkb 64
.dbsym e TXC_BUFF _TXC_BUFF A[64:64]c
_RXC_BUFF::
.blkb 64
.dbsym e RXC_BUFF _RXC_BUFF A[64:64]c
.area data(ram, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
L23:
.blkb 9
.area idata
.byte 't,'e,'s,'t,32,'o,'k,33,0
.area data(ram, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
L17:
.blkb 7
.area idata
.byte 'H,'E,'L,'L,'O,33,0
.area data(ram, con, rel)
.dbfile C:\work\UART_MEGA128\uart2.c
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