/*--------------------------------------------------------------------------*/
/*      define.h
/*      sample program for First Step Guide
/*--------------------------------------------------------------------------*/
#ifndef __define_h__
#define __define_h__

#define DISABLE         0x00
#define ENABLE          0x01

/*--------------------------------------------------------------------------*/
/* Definition for system clock control register
/*--------------------------------------------------------------------------*/
#define SUB_CLOCK_MODE_0		0
#define SUB_CLOCK_MODE_1		0
#define SUB_PLL_CLOCK_MODE_0	1
#define SUB_PLL_CLOCK_MODE_1	0
#define MAIN_CLOCK_MODE_0		0
#define MAIN_CLOCK_MODE_1		1
#define MAIN_PLL_CLOCK_MODE_0	1
#define MAIN_PLL_CLOCK_MODE_1	1

#define CLOCK_DIV1_0	0			/* Source Clock / 1   */
#define CLOCK_DIV1_1	0
#define CLOCK_DIV8_0	1			/* Source Clock / 4   */
#define CLOCK_DIV8_1	0
#define CLOCK_DIV16_0	0			/* Source Clock / 8   */
#define CLOCK_DIV16_1	1
#define CLOCK_DIV32_0	1			/* Source Clock / 16  */
#define CLOCK_DIV32_1	1

/*--------------------------------------------------------------------------*/
/* Definition for PLL control register
/*--------------------------------------------------------------------------*/
#define CLOCK_X1_0		0			/* Original oscillation clock x 1   */
#define CLOCK_X1_1		0
#define CLOCK_X2_0		1			/* Original oscillation clock x 2   */
#define CLOCK_X2_1		0
#define CLOCK_X2p5_0	0			/* Original oscillation clock x 2.5 */
#define CLOCK_X2p5_1	1

#endif /* __define_h__ */