/* sysLib.c - Motorola 860DAB board system-dependent library */

/* Copyright 1998 Teltec UCD-CS */
/* Copyright 1984-1996 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01a,16sep98,rkh  started for DAB
01e,21feb97,mas  removed NOMANUAL, made sysHwInit2() visible to 'man' (SPR 7879)
01d,11nov96,tam  added power management mode initialization.
01c,06nov96,tpr  reworked sysHwInit().
01b,28may96,dzb  added Ethernet driver support routines.
		 added port initialization, and increased system to 24Mhz.
01a,19apr96,tpr  written.
*/

/*
DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    ppcDecTimer.c	- PowerPC Decrementer Timer library

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "vme.h"
#include "memLib.h"
#include "cacheLib.h"
#include "sysLib.h"
#include "config.h"
#include "string.h"
#include "intLib.h"
#include "logLib.h"
#include "routeLib.h"
#include "stdio.h"
#include "taskLib.h"
#include "vxLib.h"
#include "tyLib.h"
#include "arch/ppc/vxPpcLib.h"
#include "private/vmLibP.h"

#include "drv/multi/ppc860Siu.h"
#include "860pc.h"

#ifdef INCLUDE_CPM
#include "drv/netif/if_cpm.h"
#endif

#define PLD_BASE 0x30000000  /* defined in ca6004.h */
#define PLD_SIZE 0x00008000  /* defined in ca6004.h */

PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    {
    (void *) LOCAL_MEM_LOCAL_ADRS,
    (void *) LOCAL_MEM_LOCAL_ADRS,
    LOCAL_MEM_SIZE ,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE
    },

    {
    (void *) INTERNAL_MEM_MAP_ADDR,
    (void *) INTERNAL_MEM_MAP_ADDR,
    INTERNAL_MEM_MAP_SIZE,		/* 64 k - Internal Memory Map */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },

    {
    (void *) ROM_BASE_ADRS,
    (void *) ROM_BASE_ADRS,
    ROM_SIZE,				/* Flach memory */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },
    {
    (void *) FLASH_ADRS,
    (void *) FLASH_ADRS,
    FLASH_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    },
/* CPLD memory (32k) */
    {
    (void *) PLD_BASE,
    (void *) PLD_BASE,
    PLD_SIZE,                 
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT
    }
    /* *** */
    /* ,
    {
    (void *) 0x02100000,
    (void *) 0x02100000,
    4096,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE  | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE       | VM_STATE_CACHEABLE_NOT
    } */
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

int   sysBus      = BUS;                /* system bus type (VME_BUS, etc) */
int   sysCpu      = CPU;                /* system CPU type (PPC860) */
char *sysBootLine = BOOT_LINE_ADRS;	/* address of boot line */
char *sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */
int   sysProcNum;			/* processor number of this CPU */
int   sysFlags;				/* boot flags */
char  sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char  sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */
BOOL  sysVmeEnable = FALSE;		/* by default no VME */

#ifdef	INCLUDE_CPM
/* XXX set the following array to a unique Ethernet hardware address XXX */

/* last 5 nibbles are board specific, initialized in sysHwInit */

unsigned char sysCpmEnetAddr [6] = {0x08,0x00,0x3e,0x03,0x02,0x09};
/*unsigned char sysCpmEnetIp[16] = "192.168.0.42";*/

extern STATUS cpmattach();
#endif	/* INCLUDE_CPM */

/* locals */
void sysCpmEnetDisable (int unit);
void sysCpmEnetIntDisable (int unit);


#ifdef INCLUDE_MOT_FEC
unsigned char sysFecEnetAddr[6];

IMPORT STATUS sysFccEnetDisable(UINT32 motCpmaddr);

#endif/* INCLUDE_MOT_FEC */

#include "sysSerial.c"
#include "intrCtl/ppc860Intr.c"
#include "timer/ppcDecTimer.c"		/* PPC860 & 821 have on chip timers */
/* #include "mem/nullNvRam.c" */
#include "flashMem.c"
#include "bootLine.c"
#include "sysMotCpmEnd.c"
/* #include "motFecEnd.c" */

#include "ca6004.c"


/******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string.
*/

char * sysModel (void)
    {
    return ("Motorola 860pc - PowerPC 860");
    }

/******************************************************************************
*
* sysBspRev - return the bsp version with the revision eg 1.0/<x>
*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the MPC860DAB boards. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    char  initValue[NV_INIT_SIZE+1];
    UINT8 macAdrs[6];
    int	immrVal = vxImmrGet();

    /* set the SPLL to the value requested */

    * PLPRCR(immrVal) = (*PLPRCR(immrVal) & ~PLPRCR_MF_MSK) | 
				(SPLL_MUL_FACTOR << PLPRCR_MF_SHIFT);

    /* set the BRGCLK division factor */

    * SCCR(immrVal) = (* SCCR(immrVal) & ~SCCR_DFBRG_MSK) |
				(BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT);
     
    /* reset the port A */

    *PAPAR(immrVal) = 0x0000;
    *PADIR(immrVal) = 0x0000; /* *PADIR(immrVal) = 0x0008;*/
    *PAODR(immrVal) = 0x0000;
    *PADAT(immrVal) = 0x0000; /* *PADIR(immrVal) = 0x0008; */

    /* reset the port B */

    *PBPAR(immrVal) = 0x00000000;
    *PBDIR(immrVal) = 0x00000000;
    *PBODR(immrVal) = 0x00000000;

    /* reset the port C */

    *PCPAR(immrVal) = 0x0000;
    *PCDIR(immrVal) = 0x0000;
    *PCSO(immrVal)  = 0x0000;

    /* reset the port D */

    *PDPAR(immrVal) = 0x0000;
    *PDDIR(immrVal) = 0x0000;
    
    /* config private I2C channel */
    /* added by TANG 2003.6.16 */
/*    
    *PBPAR(immrVal) &= 0xfffe13ff;
    *PCPAR(immrVal) &= 0xfff0;
    *PBDIR(immrVal) |= 0x0001ec00;
    *PCDIR(immrVal) |= 0x000f;
    *PCSO(immrVal)  &= 0xfff0;
    *CIMR(immrVal)  &= 0x7a7fffff;  
*/       

    *SICR(immrVal) = 0x0;		/* initialize SI/NMSI connections */

    /* Initialize interrupts */

    ppc860IntrInit(IV_LEVEL4);	/* default vector level */

    /* Reset serial channels */

    sysSerialHwInit();

    /* make sure Ethernet is disabled */

    sysCpmEnetDisable (0);
    sysCpmEnetIntDisable (0);
    
#ifdef INCLUDE_MOT_FEC
    sysFecEnetDisable(immrVal);
#endif /*INCLUDE_MOT_FEC*/

    /* ensure bootline exist in NVRAM */
    if ((sysNvRamGet(&initValue[0],NV_INIT_SIZE+1,-NV_BOOT_OFFSET)) != ERROR)
	{
	  
	  if ( strcmp( initValue, NVRAM_INITIALIZED) != 0 ) 
	  {
	  	
	    (void)sysNvRamSet(DEFAULT_BOOT_LINE, strlen(DEFAULT_BOOT_LINE)+1,0);
			
	  }
	}
    if ((sysFlashGet(&initValue[0],NV_INIT_SIZE+1,MAC_ADRS-FLASH_ADRS)) != ERROR)
	{
	  
	  if ( strcmp( initValue, NVRAM_INITIALIZED) != 0 ) 
	    {
	     bcopy((UINT8*)DEFAULT_10M_MAC_ADRS,(UINT8*)macAdrs,6);
	     
	     #ifdef INCLUDE_MOT_FEC
	       bcopy((UINT8*)DEFAULT_100M_MAC_ADRS,(UINT8*)(macAdrs+6),6);
	       bcopy((UINT8*)DEFAULT_10M_IP,(UINT8*)(macAdrs+12),16);
	     #endif /* INCLUDE_MOT_FEC */
	     
	     macAdrsSet((UINT8*)macAdrs);
	   }
          else
             macAdrsGet((UINT8*)macAdrs);
        }
     bcopy((UINT8*)macAdrs,sysCpmEnetAddr,6);

#ifdef INCLUDE_MOT_FEC
     bcopy((UINT8*)(macAdrs+6),sysFecEnetAddr,6);
     bcopy((UINT8*)(macAdrs+12),sysCpmEnetIp,16);		
#endif /* INCLUDE_MOT_FEC */
    
    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is iddle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);
    }

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    static char * physTop = NULL;

    if (physTop == NULL)
	{
	physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
	}

    return (physTop) ;
    }

/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

    return memTop;
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
     int startType	/* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4);	/* Warm reboot */

    sysCpmEnetDisable (0);	/* disable the ethernet device */
 
    sysCpmEnetIntDisable (0);	/* disable the ethernet device interrupt */

#ifdef INCLUDE_MOT_FEC
	sysFecEnetDisable(vxImmrGet() );
#endif/*INCLUDE_MOT_FEC*/	

    sysSerialReset();		/* reset the serail device */

    (*pRom) (startType);	/* jump to bootrom entry point */

    return (OK);	/* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    static BOOL configured = FALSE;
    int		immrVal;

    if (!configured)
	{

	immrVal = vxImmrGet();

	/* initialize serial interrupts */

	sysSerialHwInit2();