亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

? 歡迎來到蟲蟲下載站! | ?? 資源下載 ?? 資源專輯 ?? 關(guān)于我們
? 蟲蟲下載站

?? csl_dpll.h

?? dsp在音頻處理中的運(yùn)用
?? H
?? 第 1 頁 / 共 2 頁
字號:
/** @mainpage DPLL CSL 3.x * * @section Introduction * * @subsection xxx Purpose and Scope * The purpose of this document is to identify a set of common CSL APIs for the * DPLL module across various devices. The CSL developer is expected to refer to * this document while designing APIs for these modules. Some of the listed APIs * may not be applicable to a given DPLL module. While in other cases this list * of APIs may not be sufficient to cover all the features of a particular DPLL * Module. The CSL developer should use his discretion in designing new APIs or * extending the existing ones to cover these. * * @subsection aaa Terms and Abbreviations *   -# CSL:  Chip Support Library *   -# API:  Application Programmer Interface * * @subsection References *    -# CSL-001-DES, CSL 3.x Design Specification DocumentVersion 1.02 * *//** @file csl_dpll.h * *  @brief    Header file for functional layer of CSL * *  Description *    - The different enumerations, structure definitions *      and function declarations * *  Modification 1 *    - modified on: 30/01/2004 *    - reason: Created the sources * *  @date 30th Jan, 2004 *  @author Amruth Tadas. */#ifndef _CSL_DPLL_H_#define _CSL_DPLL_H_#ifdef __cplusplusextern "C" {#endif#include <csl.h>#include <cslr_dpll.h>/**************************************************************************\* DPLL global typedef declarations\**************************************************************************//** @brief Enumeration for the Test mode */typedef enum {	/** Disable Test Mode     */	CSL_DPLL_TEST_OFF         =      0,	/** Enable Test Mode      */	CSL_DPLL_TEST_ON          =      1}CSL_DpllTest;/** @brief Enumeration for setting the DPLL mode. */typedef enum {	/** Set the DPLL mode to BYPASS         */	CSL_DPLL_MODE_BYPASS          =   0,	/** Set the DPLL mode to PLL            */	CSL_DPLL_MODE_LOCK            =   1}CSL_DpllMode;/** @brief Enumeration for the Initialize of Break setting */typedef enum {	/** Disable Initialize on Break */	CSL_DPLL_IOB_OFF = 0,	/** Enable  Initialize on Break */	CSL_DPLL_IOB_ON  = 1}CSL_DpllIob;/** @brief Enumeration for the line break status information. */typedef enum {	/** DPLL has broken lock      */	CSL_DPLL_LINE_BREAK      =       0,	/** DPLL Lock has been restored or write to control register has occurred  */	CSL_DPLL_LINE_NOBREAK    =       1}CSL_DpllLine;/** @brief Enumeration for the lock status information */ typedef enum {	/** DPLL is NOT in Locked Mode  */	CSL_DPLL_LOCK_OFF    	=  0,	/** DPLL is in Locked Mode      */	CSL_DPLL_LOCK_ON        =  1}CSL_DpllLock;/** @brief Enumeration for the level shifter */ typedef enum {	/** Level shifter in transparent Mode  */	CSL_DPLL_LEVEL_TRANSPARENT_MODE    	=  0,	/** Level shifter in isolated   Mode   */	CSL_DPLL_LEVEL_ISOLATED_MODE        =  1}CSL_DpllLevel;/** @brief Enumeration for queries passed to @a CSL_dpllHwControl() * * This is used to select the commands to control the operations * existing setup of DPLL. The arguments to be passed with each * enumeration if any are specified next to the enumeration */typedef enum {	/** Set the DPLL Mode :  argument type @a CSL_DpllMode	                 */	CSL_DPLL_CMD_SET_MODE = 1,	/** Set the frequency of the o/p clock. The clock multiplier and divider are	 *  passed as part of @ CSL_DpllHwSetup structure.	 *  <b> Note:</b> Only pllmult, plldiv and bypassdiv are used in the	 *  @a CSL_DpllHwSetup structure. In case of BYPASS MODE, only bypassdiv is used.     *  In case of LOCK MODE, both pllmult and plldiv are used.     */	CSL_DPLL_CMD_SET_FREQ = 2} CSL_DpllHwControlCmd;/** @brief Enumeration for queries passed to @a CSL_dpllGetHwStatus() * * This is used to get the status of different operations or to get the * existing setup of DPLL. The status information is returned with argument * next to the enumeration */ typedef enum {	 /** Get the status of the Lock.	  */	 CSL_DPLL_QUERY_LOCK_STATUS    = 1,	 /** Get the DPLL mode.    	          */	 CSL_DPLL_QUERY_MODE_STATUS    = 2,	 /** Get the break status   	      */     CSL_DPLL_QUERY_BREAK_STATUS   = 3} CSL_DpllHwStatusQuery ;/** * @brief   The config-structure * * Used to configure the DPLL using CSL_dpllHwSetupRaw(..) */typedef struct {    Uint16  CTL;   /**< CTL register */} CSL_DpllConfig;/** * @brief   Default values for the config-structure */#define CSL_DPLL_CONFIG_DEFAULTS {              \                                                \    CSL_FMKT(DPLL_CTL_LS_DISABLE, RESETVAL)  |   \    CSL_FMKT(DPLL_CTL_IAI, RESETVAL)         |   \    CSL_FMKT(DPLL_CTL_IOB, RESETVAL)         |   \    CSL_FMKT(DPLL_CTL_TEST, RESETVAL)        |   \    CSL_FMKT(DPLL_CTL_PLL_MULT, RESETVAL)    |   \    CSL_FMKT(DPLL_CTL_PLL_DIV, RESETVAL)     |   \    CSL_FMKT(DPLL_CTL_PLL_ENABLE, RESETVAL)  |   \    CSL_FMKT(DPLL_CTL_BYPASS_DIV, RESETVAL)  |   \    CSL_FMKT(DPLL_CTL_BREAKLN, RESETVAL)     |   \    CSL_FMKT(DPLL_CTL_LOCK, RESETVAL)            \}/** @brief This object contains the reference to the instance of DPLL opened *  using the @a CSL_dpllOpen(). * *  The pointer to this, is passed to all DPLL CSL APIs. */typedef struct CSL_DpllObj {	/** This is a pointer to the registers of the instance of DPLL     *  referred to by this object     */	CSL_DpllRegsOvly regs;	/** This is the instance of DPLL being referred to by this object  */	CSL_InstNum  	perNum;} CSL_DpllObj;typedef struct CSL_DpllObj *CSL_DpllHandle;/** @brief This will have the base-address information for the peripheral *  instance */typedef struct {	/** Base-address of the Configuration registers of the peripheral	 */	CSL_DpllRegsOvly	regs;} CSL_DpllBaseAddress;/** @brief Module specific parameters. Present implementation doesn't have *  any module specific parameters. */typedef struct{	/** Bit mask to be used for module specific parameters.         *  The below declaration is just a place-holder for future 	 *  implementation.	 */	CSL_BitMask16   flags;} CSL_DpllParam;/** @brief Module specific context information. Present implementation doesn't have *  any Context information. */typedef struct {	/** Context information of DPLL.         *  The below declaration is just a place-holder for future 	 *  implementation. 	 */    Uint16	contextInfo;} CSL_DpllContext;/** @brief This has all the fields required to configure DPLL at Power Up * (After a Hardware Reset). * * This structure is used to setup or obtain the existing setup of * DPLL using @a CSL_dpllHwSetup() & @a CSL_dpllGetHwSetup() functions * respectively. */typedef struct CSL_DpllHwSetup {	/** Level shifter. 1==>Level shifter in isolated mode,	 *   0==>Level shifter in transparent mode  */	Uint16                  ls_mode;	/** Initialize on Break. 1==> Enable, 0==> Disable */    Uint16                 iob;    /** PLL or Bypass Mode 1==>LOCK mode, 0==>Bypass mode */    Uint16                pllMode;    /** DPLL clock multiplier value in PLL mode. */    Uint16                  pllmult;    /** DPLL clock divider value in PLL mode.     *  The clockout will be clkref/(plldiv+1)(as per spec)     */    Uint16                  plldiv;    /** DPLL clock divider value in Bypass mode. */    Uint16                  bypassdiv;    /** DPLL test/normal mode  1==>Test mode. 0==> Normal mode */    Uint16                test;}CSL_DpllHwSetup;/** * @brief   Default values for the setup-parameters */#define CSL_DPLL_HWSETUP_DEFAULTS {    \    /* .ls_mode        = */    0x0,    \    /* .iob            = */    0x1,    \    /* .pllMode        = */    0x1,    \    /* .pllmult        = */    0x0,    \    /* .plldiv         = */    0x0,    \    /* .bypassdiv      = */    0x0,    \    /* .test           = */    0x0     \}/**************************************************************************\* DPLL global function declarations\**************************************************************************//** @brief Peripheral specific initialization function. * * This is the peripheral specific intialization function. This function is * idempotent in that calling it many times is same as calling it once. * This function initializes the CSL data structures, and doesn't touches * the hardware. * * <b> Usage Constraints: </b> * This function should be called before using any of the CSL APIs in the DPLL * module. * *  Note: As DPLL doesn't have any context based information, currently, the function *  just returns CSL_SOK. User is expected to pass NULL in the function call. * * @b Example: * @verbatim   ...   if (CSL_SOK != CSL_dpllInit(NULL)) {       return;   }   @endverbatim * * @return returns the status of the operation * */CSL_Status CSL_dpllInit(	/** DPLL specific context information	 */	CSL_DpllContext * pContext	);/** @brief Opens the instance of DPLL requested. * *  The open call sets up the data structures for the particular instance of

?? 快捷鍵說明

復(fù)制代碼 Ctrl + C
搜索代碼 Ctrl + F
全屏模式 F11
切換主題 Ctrl + Shift + D
顯示快捷鍵 ?
增大字號 Ctrl + =
減小字號 Ctrl + -
亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
久久精品夜夜夜夜久久| 欧美体内she精高潮| 国产成人精品影院| 国产精品538一区二区在线| 91蜜桃网址入口| 中文字幕一区在线| 91麻豆产精品久久久久久| 亚洲欧美成aⅴ人在线观看| 91久久精品日日躁夜夜躁欧美| 国产精品久久久久三级| 在线免费精品视频| 日韩成人伦理电影在线观看| 2欧美一区二区三区在线观看视频| 国产高清不卡二三区| 一区二区三区在线视频免费| 91精品国产综合久久福利 | 欧美亚洲一区二区在线观看| 亚洲综合999| 精品免费国产一区二区三区四区| 国产成人免费视| 8x8x8国产精品| 亚洲国产精品二十页| 麻豆freexxxx性91精品| 中文字幕不卡的av| 欧美色综合影院| 国产精品一区一区| 亚洲午夜久久久| 国产视频亚洲色图| 欧美久久高跟鞋激| 99久久久精品| 麻豆成人av在线| 亚洲午夜免费视频| 国产欧美日本一区二区三区| 91精品欧美一区二区三区综合在| 国产成人免费在线视频| 日韩高清一区在线| 亚洲欧美在线高清| 亚洲精品在线网站| 欧美另类z0zxhd电影| av电影天堂一区二区在线| 麻豆成人久久精品二区三区红 | 国产欧美日本一区视频| 欧美日韩成人一区二区| 老色鬼精品视频在线观看播放| 成人小视频在线| 最新欧美精品一区二区三区| 日韩欧美精品在线| 欧美三级乱人伦电影| 91在线国产观看| 高清不卡在线观看av| 美女高潮久久久| 午夜精品久久久久久久99樱桃| 国产精品乱码人人做人人爱| 日韩免费在线观看| 欧美日本一区二区| 精品污污网站免费看| 色婷婷综合激情| 9色porny自拍视频一区二区| 国产一区二区三区四区在线观看| 日本欧美加勒比视频| 亚洲午夜免费视频| 依依成人综合视频| 亚洲卡通动漫在线| 亚洲欧美aⅴ...| 成人欧美一区二区三区黑人麻豆| 久久久国产精品午夜一区ai换脸| 欧美刺激午夜性久久久久久久| 91精品国产一区二区三区香蕉| 久久99精品国产91久久来源| 欧美精选在线播放| 丝袜亚洲精品中文字幕一区| 91福利资源站| 久久se精品一区精品二区| 午夜影院在线观看欧美| 亚洲一区二区三区自拍| 亚洲一区在线观看网站| 一区二区三区鲁丝不卡| 亚洲午夜一区二区| 午夜伦理一区二区| 麻豆视频一区二区| 紧缚捆绑精品一区二区| 国产在线精品免费| 成人丝袜18视频在线观看| av网站免费线看精品| 91蝌蚪porny九色| 色婷婷亚洲综合| 69堂亚洲精品首页| 日韩欧美你懂的| 国产精品丝袜一区| 中文字幕日韩一区| 亚洲一级电影视频| 人人爽香蕉精品| 免费精品视频在线| av电影在线观看完整版一区二区| 久久精品一区二区三区不卡| 国产精品麻豆网站| 亚洲综合男人的天堂| 五月婷婷色综合| 国产麻豆成人传媒免费观看| eeuss鲁一区二区三区| 91国偷自产一区二区三区观看 | 亚洲午夜精品在线| 美女网站一区二区| 国产精品一区在线| 在线精品视频一区二区三四| 日韩视频在线一区二区| 国产视频亚洲色图| 亚洲制服丝袜在线| 国产一区二区三区综合| 91麻豆精东视频| 精品欧美一区二区在线观看| 中文字幕一区日韩精品欧美| 午夜精品aaa| 懂色av一区二区三区免费看| 欧美色电影在线| 久久蜜桃香蕉精品一区二区三区| 亚洲柠檬福利资源导航| 美女在线一区二区| 色嗨嗨av一区二区三区| 欧美大白屁股肥臀xxxxxx| 亚洲色图在线播放| 久久精品国产精品亚洲红杏| 91免费看片在线观看| 精品国产免费久久| 亚洲成人综合在线| av亚洲产国偷v产偷v自拍| 日韩美女视频在线| 久久这里只有精品首页| 亚洲小说春色综合另类电影| 91精品国产色综合久久久蜜香臀| 亚洲欧美日韩国产手机在线| 婷婷亚洲久悠悠色悠在线播放| 亚洲麻豆国产自偷在线| 麻豆成人久久精品二区三区红| 91免费国产视频网站| 久久老女人爱爱| 美腿丝袜一区二区三区| 欧美在线一二三四区| 欧美国产日本视频| 久久99国产精品麻豆| 制服丝袜一区二区三区| 一级特黄大欧美久久久| 成人综合婷婷国产精品久久免费| 日韩欧美视频在线| 日韩电影免费一区| 欧美日韩性生活| 一区二区三区日韩在线观看| 成人av网址在线| 欧美国产欧美亚州国产日韩mv天天看完整 | 久久不见久久见免费视频7 | 亚洲精品乱码久久久久| 亚洲国产欧美日韩另类综合 | 一色屋精品亚洲香蕉网站| 国内成人免费视频| 精品国产乱码久久久久久久久| 五月婷婷激情综合| 欧美美女视频在线观看| 亚洲国产日韩av| 欧美日韩久久久久久| 亚洲第一主播视频| 制服丝袜激情欧洲亚洲| 亚洲h动漫在线| 欧美顶级少妇做爰| 日本麻豆一区二区三区视频| 91精品国产美女浴室洗澡无遮挡| 亚洲成av人片一区二区| 欧美精品第1页| 日韩电影在线看| 日韩精品一区二区三区在线播放 | 日韩一区二区三区电影在线观看 | 99精品久久久久久| 国产精品成人一区二区三区夜夜夜| 国产91露脸合集magnet| 国产精品精品国产色婷婷| 97se亚洲国产综合自在线观| 一区二区三区小说| 欧美福利电影网| 久久99最新地址| 欧美高清在线精品一区| 色域天天综合网| 亚洲风情在线资源站| 欧美一卡二卡在线| 国产一区 二区| 国产精品高潮久久久久无| 在线免费视频一区二区| 日韩电影在线一区二区三区| 久久综合丝袜日本网| 97久久精品人人爽人人爽蜜臀| 国产日韩欧美一区二区三区乱码| 日韩亚洲欧美中文三级| 欧美精品一区视频| 久久久久成人黄色影片| 国产自产v一区二区三区c| 91小视频在线| 亚洲国产成人精品视频| 欧美一区二区三区在线| 国产福利一区二区| 亚洲午夜av在线| 精品福利一区二区三区免费视频| 成人理论电影网|