; lpm_decode.inc                   ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal60.inc                    ; yes             ; Other                              ; d:/altera/quartus60/libraries/megafunctions/aglobal60.inc           ;
+----------------------------------+-----------------+------------------------------------+---------------------------------------------------------------------+


+-----------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary                     ;
+----------------------+------------------------------------------+
; Resource             ; Usage                                    ;
+----------------------+------------------------------------------+
; Logic cells          ; 12                                       ;
; Total registers      ; 4                                        ;
; I/O pins             ; 11                                       ;
; Maximum fan-out node ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0] ;
; Maximum fan-out      ; 12                                       ;
; Total fan-out        ; 67                                       ;
; Average fan-out      ; 2.91                                     ;
+----------------------+------------------------------------------+


+------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                      ;
+-------------------------------+------------+------+--------------------------------------+
; Compilation Hierarchy Node    ; Macrocells ; Pins ; Full Hierarchy Name                  ;
+-------------------------------+------------+------+--------------------------------------+
; |CN                           ; 12         ; 11   ; |CN                                  ;
;    |CNT10:inst|               ; 5          ; 0    ; |CN|CNT10:inst                       ;
;       |lpm_counter:CQI_rtl_0| ; 4          ; 0    ; |CN|CNT10:inst|lpm_counter:CQI_rtl_0 ;
;    |DECL7S:inst1|             ; 7          ; 0    ; |CN|DECL7S:inst1                     ;
+-------------------------------+------------+------+--------------------------------------+


+-----------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: CNT10:inst|lpm_counter:CQI_rtl_0 ;
+------------------------+-------------------+--------------------------------------+
; Parameter Name         ; Value             ; Type                                 ;
+------------------------+-------------------+--------------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                           ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                         ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                         ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE                       ;
; LPM_WIDTH              ; 4                 ; Untyped                              ;
; LPM_DIRECTION          ; UP                ; Untyped                              ;
; LPM_MODULUS            ; 0                 ; Untyped                              ;
; LPM_AVALUE             ; UNUSED            ; Untyped                              ;
; LPM_SVALUE             ; UNUSED            ; Untyped                              ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                              ;
; DEVICE_FAMILY          ; MAX3000A          ; Untyped                              ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                              ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH                   ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK                   ;
; CARRY_CNT_EN           ; SMART             ; Untyped                              ;
; LABWIDE_SCLR           ; ON                ; Untyped                              ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                              ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                              ;
+------------------------+-------------------+--------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Wed Apr 15 16:57:07 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off CN -c CN
Info: Found 2 design units, including 1 entities, in source file old_DECL7S.vhd
    Info: Found design unit 1: DECL7S-one
    Info: Found entity 1: DECL7S
Info: Found 2 design units, including 1 entities, in source file old_old_CNT10.vhd
    Info: Found design unit 1: CNT10-behav
    Info: Found entity 1: CNT10
Info: Found 1 design units, including 1 entities, in source file CN.bdf
    Info: Found entity 1: CN
Info: Elaborating entity "CN" for the top level hierarchy
Info: Elaborating entity "CNT10" for hierarchy "CNT10:inst"
Info: Elaborating entity "DECL7S" for hierarchy "DECL7S:inst1"
Info: Inferred 1 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "CNT10:inst|CQI[0]~128"
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "CNT10:inst|lpm_counter:CQI_rtl_0"
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "CLOCK0" to global clock signal
Info: Implemented 23 device resources after synthesis - the final resource count might be different
    Info: Implemented 3 input pins
    Info: Implemented 8 output pins
    Info: Implemented 12 macrocells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
    Info: Processing ended: Wed Apr 15 16:57:12 2009
    Info: Elapsed time: 00:00:06