?? cn.fit.rpt
字號:
+-----------------------------------------------------------------------------------------------+
; Control Signals ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
; CLOCK0 ; PIN_87 ; 4 ; Clock ; yes ; On ; -- ;
; ENA0 ; PIN_85 ; 4 ; Clock enable ; no ; -- ; -- ;
; RST0 ; PIN_27 ; 4 ; Async. clear ; no ; -- ; -- ;
+--------+----------+---------+--------------+--------+----------------------+------------------+
+-----------------------------------------------------------------------+
; Global & Other Fast Signals ;
+--------+----------+---------+----------------------+------------------+
; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ;
+--------+----------+---------+----------------------+------------------+
; CLOCK0 ; PIN_87 ; 4 ; On ; -- ;
+--------+----------+---------+----------------------+------------------+
+----------------------------------------------------+
; Non-Global High Fan-Out Signals ;
+------------------------------------------+---------+
; Name ; Fan-Out ;
+------------------------------------------+---------+
; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3] ; 12 ;
; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1] ; 12 ;
; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0] ; 12 ;
; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2] ; 11 ;
; ENA0 ; 4 ;
; RST0 ; 4 ;
; DECL7S:inst1|Mux5~192 ; 1 ;
; DECL7S:inst1|Mux6~115 ; 1 ;
; DECL7S:inst1|Mux3~125 ; 1 ;
; DECL7S:inst1|Mux2~48 ; 1 ;
; DECL7S:inst1|Mux4~121 ; 1 ;
; DECL7S:inst1|Mux1~147 ; 1 ;
; DECL7S:inst1|Mux0~288 ; 1 ;
; CNT10:inst|Equal0~33 ; 1 ;
+------------------------------------------+---------+
+----------------------------------------------+
; Interconnect Usage Summary ;
+----------------------------+-----------------+
; Interconnect Resource Type ; Usage ;
+----------------------------+-----------------+
; Output enables ; 0 / 6 ( 0 % ) ;
; PIA buffers ; 6 / 288 ( 2 % ) ;
; PIAs ; 6 / 288 ( 2 % ) ;
+----------------------------+-----------------+
+----------------------------------------------------------------------------+
; LAB External Interconnect ;
+----------------------------------------------+-----------------------------+
; LAB External Interconnects (Average = 0.75) ; Number of LABs (Total = 1) ;
+----------------------------------------------+-----------------------------+
; 0 ; 7 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 1 ;
+----------------------------------------------+-----------------------------+
+----------------------------------------------------------------------+
; LAB Macrocells ;
+----------------------------------------+-----------------------------+
; Number of Macrocells (Average = 1.50) ; Number of LABs (Total = 1) ;
+----------------------------------------+-----------------------------+
; 0 ; 7 ;
; 1 ; 0 ;
; 2 ; 0 ;
; 3 ; 0 ;
; 4 ; 0 ;
; 5 ; 0 ;
; 6 ; 0 ;
; 7 ; 0 ;
; 8 ; 0 ;
; 9 ; 0 ;
; 10 ; 0 ;
; 11 ; 0 ;
; 12 ; 1 ;
+----------------------------------------+-----------------------------+
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection ;
+-----+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input ; Output ;
+-----+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; A ; LC2 ; CLOCK0, CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], RST0, ENA0 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|Equal0~33, DECL7S:inst1|Mux0~288, DECL7S:inst1|Mux1~147, DECL7S:inst1|Mux4~121, DECL7S:inst1|Mux2~48, DECL7S:inst1|Mux3~125, DECL7S:inst1|Mux6~115, DECL7S:inst1|Mux5~192 ;
; A ; LC4 ; CLOCK0, CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], RST0, ENA0 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|Equal0~33, DECL7S:inst1|Mux0~288, DECL7S:inst1|Mux1~147, DECL7S:inst1|Mux4~121, DECL7S:inst1|Mux2~48, DECL7S:inst1|Mux3~125, DECL7S:inst1|Mux6~115, DECL7S:inst1|Mux5~192 ;
; A ; LC7 ; CLOCK0, CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], RST0, ENA0 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|Equal0~33, DECL7S:inst1|Mux0~288, DECL7S:inst1|Mux1~147, DECL7S:inst1|Mux4~121, DECL7S:inst1|Mux2~48, DECL7S:inst1|Mux3~125, DECL7S:inst1|Mux6~115, DECL7S:inst1|Mux5~192 ;
; A ; LC10 ; CLOCK0, CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], RST0, ENA0 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|Equal0~33, DECL7S:inst1|Mux0~288, DECL7S:inst1|Mux1~147, DECL7S:inst1|Mux4~121, DECL7S:inst1|Mux2~48, DECL7S:inst1|Mux3~125, DECL7S:inst1|Mux6~115, DECL7S:inst1|Mux5~192 ;
; A ; LC1 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1] ; COUT0 ;
; A ; LC3 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0] ; LED[6] ;
; A ; LC5 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1] ; LED[5] ;
; A ; LC6 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0] ; LED[2] ;
; A ; LC8 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1] ; LED[4] ;
; A ; LC9 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0] ; LED[3] ;
; A ; LC11 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1] ; LED[0] ;
; A ; LC13 ; CNT10:inst|lpm_counter:CQI_rtl_0|dffs[3], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[0], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[1], CNT10:inst|lpm_counter:CQI_rtl_0|dffs[2] ; LED[1] ;
+-----+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------+
; Fitter Device Options ;
+----------------------------------------------+-----------------------------------------+
; Option ; Setting ;
+----------------------------------------------+-----------------------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off ;
; Enable device-wide reset (DEV_CLRn) ; Off ;
; Enable device-wide output enable (DEV_OE) ; Off ;
; Enable INIT_DONE output ; Off ;
; Configuration scheme ; Passive Serial ;
; Reserve all unused pins ; As output driving an unspecified signal ;
; Security bit ; Off ;
; Base pin-out file on sameframe device ; Off ;
+----------------------------------------------+-----------------------------------------+
+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
Info: Processing started: Wed Apr 15 16:57:17 2009
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off CN -c CN
Info: Selected device EPM3128ATC100-10 for design "CN"
Info: Quartus II Fitter was successful. 0 errors, 0 warnings
Info: Processing ended: Wed Apr 15 16:57:18 2009
Info: Elapsed time: 00:00:03
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