#define XEM_EIR_RECV_LFIFO_OVER_MASK   0x00000080UL	/* Recv length fifo							 * overrun */#define XEM_EIR_RECV_LFIFO_UNDER_MASK  0x00000100UL	/* Recv length fifo							 * underrun */#define XEM_EIR_XMIT_SFIFO_OVER_MASK   0x00000200UL	/* Xmit status fifo							 * overrun */#define XEM_EIR_XMIT_SFIFO_UNDER_MASK  0x00000400UL	/* Transmit status fifo							 * underrun */#define XEM_EIR_XMIT_LFIFO_OVER_MASK   0x00000800UL	/* Transmit length fifo							 * overrun */#define XEM_EIR_XMIT_LFIFO_UNDER_MASK  0x00001000UL	/* Transmit length fifo							 * underrun */#define XEM_EIR_XMIT_PAUSE_MASK	       0x00002000UL	/* Transmit pause pkt							 * received */#define XEM_EIR_RECV_DFIFO_OVER_MASK   0x00004000UL	/* Receive data fifo							 * overrun */#define XEM_EIR_RECV_MISSED_FRAME_MASK 0x00008000UL	/* Receive missed frame							 * error */#define XEM_EIR_RECV_COLLISION_MASK    0x00010000UL	/* Receive collision							 * error */#define XEM_EIR_RECV_FCS_ERROR_MASK    0x00020000UL	/* Receive FCS error */#define XEM_EIR_RECV_LEN_ERROR_MASK    0x00040000UL	/* Receive length field							 * error */#define XEM_EIR_RECV_SHORT_ERROR_MASK  0x00080000UL	/* Receive short frame							 * error */#define XEM_EIR_RECV_LONG_ERROR_MASK   0x00100000UL	/* Receive long frame							 * error */#define XEM_EIR_RECV_ALIGN_ERROR_MASK  0x00200000UL	/* Receive alignment							 * error *//**************************** Type Definitions *******************************//***************** Macros (Inline Functions) Definitions *********************//******************************************************************************* Low-level driver macros and functions. The list below provides signatures* to help the user use the macros.** u32 XEmac_mReadReg(u32 BaseAddress, int RegOffset)* void XEmac_mWriteReg(u32 BaseAddress, int RegOffset, u32 Mask)** void XEmac_mSetControlReg(u32 BaseAddress, u32 Mask)* void XEmac_mSetMacAddress(u32 BaseAddress, u8 *AddressPtr)** void XEmac_mEnable(u32 BaseAddress)* void XEmac_mDisable(u32 BaseAddress)** u32 XEmac_mIsTxDone(u32 BaseAddress)* u32 XEmac_mIsRxEmpty(u32 BaseAddress)** void XEmac_SendFrame(u32 BaseAddress, u8 *FramePtr, int Size)* int XEmac_RecvFrame(u32 BaseAddress, u8 *FramePtr)******************************************************************************//****************************************************************************//**** Read the given register.** @param    BaseAddress is the base address of the device* @param    RegOffset is the register offset to be read** @return   The 32-bit value of the register** @note	    None.******************************************************************************/#define XEmac_mReadReg(BaseAddress, RegOffset) \		    XIo_In32((BaseAddress) + (RegOffset))/****************************************************************************//**** Write the given register.** @param    BaseAddress is the base address of the device* @param    RegOffset is the register offset to be written* @param    Data is the 32-bit value to write to the register** @return   None.** @note	    None.******************************************************************************/#define XEmac_mWriteReg(BaseAddress, RegOffset, Data) \		    XIo_Out32((BaseAddress) + (RegOffset), (Data))/****************************************************************************//**** Set the contents of the control register. Use the XEM_ECR_* constants* defined above to create the bit-mask to be written to the register.** @param    BaseAddress is the base address of the device* @param    Mask is the 16-bit value to write to the control register** @return   None.** @note	    None.******************************************************************************/#define XEmac_mSetControlReg(BaseAddress, Mask) \		    XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, (Mask))/****************************************************************************//**** Set the station address of the EMAC device.** @param    BaseAddress is the base address of the device* @param    AddressPtr is a pointer to a 6-byte MAC address** @return   None.** @note	    None.******************************************************************************/#define XEmac_mSetMacAddress(BaseAddress, AddressPtr)		    \{								    \    u32 MacAddr;						\								    \    MacAddr = ((AddressPtr)[0] << 8) | (AddressPtr)[1];		    \    XIo_Out32((BaseAddress) + XEM_SAH_OFFSET, MacAddr);		    \								    \    MacAddr = ((AddressPtr)[2] << 24) | ((AddressPtr)[3] << 16) |   \	      ((AddressPtr)[4] << 8) | (AddressPtr)[5];		    \								    \    XIo_Out32((BaseAddress) + XEM_SAL_OFFSET, MacAddr);		    \}/****************************************************************************//**** Enable the transmitter and receiver. Preserve the contents of the control* register.** @param    BaseAddress is the base address of the device** @return   None.** @note	    None.******************************************************************************/#define XEmac_mEnable(BaseAddress) \{ \    u32 Control; \    Control = XIo_In32((BaseAddress) + XEM_ECR_OFFSET); \    Control &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); \    Control |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); \    XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \}/****************************************************************************//**** Disable the transmitter and receiver. Preserve the contents of the control* register.** @param    BaseAddress is the base address of the device** @return   None.** @note	    None.******************************************************************************/#define XEmac_mDisable(BaseAddress) \		XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, \		    XIo_In32((BaseAddress) + XEM_ECR_OFFSET) & \		    ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK))/****************************************************************************//**** Check to see if the transmission is complete.** @param    BaseAddress is the base address of the device** @return   TRUE if it is done, or FALSE if it is not.** @note	    None.******************************************************************************/#define XEmac_mIsTxDone(BaseAddress) \	     (XIo_In32((BaseAddress) + XEM_ISR_OFFSET) & XEM_EIR_XMIT_DONE_MASK)/****************************************************************************//**** Check to see if the receive FIFO is empty.** @param    BaseAddress is the base address of the device** @return   TRUE if it is empty, or FALSE if it is not.** @note	    None.******************************************************************************/#define XEmac_mIsRxEmpty(BaseAddress) \	  (!(XIo_In32((BaseAddress) + XEM_ISR_OFFSET) & XEM_EIR_RECV_DONE_MASK))/****************************************************************************//**** Reset MII compliant PHY** @param    BaseAddress is the base address of the device** @return   None.** @note	    None.******************************************************************************/#define XEmac_mPhyReset(BaseAddress) \{ \    u32 Control;				    \    Control = XIo_In32((BaseAddress) + XEM_ECR_OFFSET); \    Control &= ~XEM_ECR_PHY_ENABLE_MASK;		\    XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \    Control |= XEM_ECR_PHY_ENABLE_MASK;			\    XIo_Out32((BaseAddress) + XEM_ECR_OFFSET, Control); \}/************************** Function Prototypes ******************************/void XEmac_SendFrame(u32 BaseAddress, u8 * FramePtr, int Size);int XEmac_RecvFrame(u32 BaseAddress, u8 * FramePtr);#endif				/* end of protection macro */