/*******************************************************************
*
* CAUTION: This file is automatically generated by libgen.
* Version: Xilinx EDK 7.1.1 EDK_H.11.3
* DO NOT EDIT.
*
* Copyright (c) 2005 Xilinx, Inc.  All rights reserved. 
* 
* Description: Driver parameters
*
*******************************************************************/

#define STDIN_BASEADDRESS 0x80810000
#define STDOUT_BASEADDRESS 0x80810000

/******************************************************************/

#define XPAR_DLMB_CNTLR_BASEADDR 0x00000000
#define XPAR_DLMB_CNTLR_HIGHADDR 0x00001FFF
#define XPAR_ILMB_CNTLR_BASEADDR 0x00000000
#define XPAR_ILMB_CNTLR_HIGHADDR 0x00001FFF

/******************************************************************/

#define XPAR_XUARTLITE_NUM_INSTANCES 2
#define XPAR_DEBUG_MODULE_BASEADDR 0x80800000
#define XPAR_DEBUG_MODULE_HIGHADDR 0x8080FFFF
#define XPAR_DEBUG_MODULE_DEVICE_ID 0
#define XPAR_DEBUG_MODULE_BAUDRATE 0
#define XPAR_DEBUG_MODULE_USE_PARITY 0
#define XPAR_DEBUG_MODULE_ODD_PARITY 0
#define XPAR_DEBUG_MODULE_DATA_BITS 0
#define XPAR_RS232_BASEADDR 0x80810000
#define XPAR_RS232_HIGHADDR 0x8081FFFF
#define XPAR_RS232_DEVICE_ID 1
#define XPAR_RS232_BAUDRATE 19200
#define XPAR_RS232_USE_PARITY 1
#define XPAR_RS232_ODD_PARITY 1
#define XPAR_RS232_DATA_BITS 8

/******************************************************************/

#define XPAR_XGPIO_NUM_INSTANCES 1
#define XPAR_LEDS_BASEADDR 0x80820000
#define XPAR_LEDS_HIGHADDR 0x8082FFFF
#define XPAR_LEDS_DEVICE_ID 0
#define XPAR_LEDS_INTERRUPT_PRESENT 0
#define XPAR_LEDS_IS_DUAL 0

/******************************************************************/

#define XPAR_GENERIC_EXTERNAL_MEMORY_NUM_BANKS_MEM 1
#define XPAR_GENERIC_EXTERNAL_MEMORY_1_NUM_BANKS_MEM 1

/******************************************************************/

#define XPAR_GENERIC_EXTERNAL_MEMORY_MEM0_BASEADDR 0x80000000
#define XPAR_GENERIC_EXTERNAL_MEMORY_MEM0_HIGHADDR 0x801FFFFF

/******************************************************************/

#define XPAR_GENERIC_EXTERNAL_MEMORY_1_MEM0_BASEADDR 0x80200000
#define XPAR_GENERIC_EXTERNAL_MEMORY_1_MEM0_HIGHADDR 0x803FFFFF

/******************************************************************/

#define XPAR_CPU_CORE_CLOCK_FREQ_HZ 100000000

/******************************************************************/