V3 53
FL E:/download_material/virtex4_board/XTremeDSP_developmentIV/Examples/host_interface_basic/ise/host_interface/dimeclk_module_mod.vhd 2005/07/11.20:33:36 K.34
EN work/dimeclk_module 1226647668 \
      FL E:/download_material/virtex4_board/XTremeDSP_developmentIV/Examples/host_interface_basic/ise/host_interface/dimeclk_module_mod.vhd \
      PB ieee/std_logic_1164 1203817036 PH ieee/NUMERIC_STD 1203817036
AR work/dimeclk_module/BEHAVIORAL 1226647669 \
      FL E:/download_material/virtex4_board/XTremeDSP_developmentIV/Examples/host_interface_basic/ise/host_interface/dimeclk_module_mod.vhd \
      EN work/dimeclk_module 1226647668 CP IBUFG CP dcm_standby
FL E:/host_interface_basic/source/counter.vhd 2005/04/29.00:11:18 K.34
EN work/counter 1226647660 FL E:/host_interface_basic/source/counter.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/std_logic_arith 1203817037 \
      PB ieee/STD_LOGIC_UNSIGNED 1203817038 PH ieee/NUMERIC_STD 1203817036 \
      LB UNISIM PH unisim/VCOMPONENTS 1203817036
AR work/counter/counter 1226647661 \
      FL E:/host_interface_basic/source/counter.vhd EN work/counter 1226647660
FL E:/host_interface_basic/source/dcm_standby.vhd 2005/05/13.00:58:02 K.34
EN work/dcm_standby 1226647666 FL E:/host_interface_basic/source/dcm_standby.vhd \
      PB ieee/std_logic_1164 1203817036 PH ieee/NUMERIC_STD 1203817036 \
      PB ieee/STD_LOGIC_UNSIGNED 1203817038 LB UNISIM PH unisim/VCOMPONENTS 1203817036
AR work/dcm_standby/dcm_standby 1226647667 \
      FL E:/host_interface_basic/source/dcm_standby.vhd EN work/dcm_standby 1226647666 \
      CP DCM_ADV CP BUFGCTRL CP ringregosc CP counter CP RAM16X8S CP FDCPE
FL E:/host_interface_basic/source/dma_ctrl.vhd 2005/07/11.20:33:52 K.34
EN work/DMA_CTRL 1226647664 FL E:/host_interface_basic/source/dma_ctrl.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/STD_LOGIC_UNSIGNED 1203817038
AR work/DMA_CTRL/DMA_CTRL_arch 1226647665 \
      FL E:/host_interface_basic/source/dma_ctrl.vhd EN work/DMA_CTRL 1226647664 \
      CP FWFRFF_32
FL E:/host_interface_basic/source/fifocnt4.vhd 2005/07/11.20:33:52 K.34
EN work/FIFOCNT4 1226647654 FL E:/host_interface_basic/source/fifocnt4.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/STD_LOGIC_UNSIGNED 1203817038 \
      PB ieee/std_logic_arith 1203817037
AR work/FIFOCNT4/FIFOCNT4_arch 1226647655 \
      FL E:/host_interface_basic/source/fifocnt4.vhd EN work/FIFOCNT4 1226647654
FL E:/host_interface_basic/source/fwfrff_32.vhd 2005/07/11.20:33:52 K.34
EN work/FWFRFF_32 1226647656 FL E:/host_interface_basic/source/fwfrff_32.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/STD_LOGIC_UNSIGNED 1203817038 \
      PB ieee/std_logic_arith 1203817037
AR work/FWFRFF_32/FWFRFF_32_arch 1226647657 \
      FL E:/host_interface_basic/source/fwfrff_32.vhd EN work/FWFRFF_32 1226647656 \
      CP FIFOCNT4 CP RM16X32D
FL E:/host_interface_basic/source/host_interface.vhd 2005/07/11.20:33:52 K.34
EN work/host_interface 1226647674 \
      FL E:/host_interface_basic/source/host_interface.vhd PB ieee/std_logic_1164 1203817036
AR work/host_interface/host_interface_arch 1226647675 \
      FL E:/host_interface_basic/source/host_interface.vhd EN work/host_interface 1226647674 \
      CP dimeclk_module CP SV_IFACE CP SYNCFIFO
FL E:/host_interface_basic/source/if_main.vhd 2005/07/11.20:33:52 K.34
EN work/if_main 1226647662 FL E:/host_interface_basic/source/if_main.vhd \
      PB ieee/std_logic_1164 1203817036
AR work/if_main/if_main_arch 1226647663 \
      FL E:/host_interface_basic/source/if_main.vhd EN work/if_main 1226647662
FL E:/host_interface_basic/source/ringregosc.vhd 2005/05/10.00:10:22 K.34
EN work/ringregosc 1226647658 FL E:/host_interface_basic/source/ringregosc.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/std_logic_arith 1203817037 \
      PB ieee/STD_LOGIC_UNSIGNED 1203817038 LB UNISIM PH unisim/VCOMPONENTS 1203817036
AR work/ringregosc/ringregosc 1226647659 \
      FL E:/host_interface_basic/source/ringregosc.vhd EN work/ringregosc 1226647658 \
      CP FDCPE CP MUXF5
FL E:/host_interface_basic/source/sv_iface.vhd 2005/07/11.20:33:52 K.34
EN work/SV_IFACE 1226647670 FL E:/host_interface_basic/source/sv_iface.vhd \
      PB ieee/std_logic_1164 1203817036
AR work/SV_IFACE/SV_IFACE_arch 1226647671 \
      FL E:/host_interface_basic/source/sv_iface.vhd EN work/SV_IFACE 1226647670 \
      CP IF_MAIN CP DMA_CTRL
FL E:/host_interface_basic/source/syncfifo.vhd 2005/07/11.20:33:52 K.34
EN work/SYNCFIFO 1226647672 FL E:/host_interface_basic/source/syncfifo.vhd \
      PB ieee/std_logic_1164 1203817036 PB ieee/STD_LOGIC_UNSIGNED 1203817038
AR work/SYNCFIFO/SYNCFIFO_ARCH 1226647673 \
      FL E:/host_interface_basic/source/syncfifo.vhd EN work/SYNCFIFO 1226647672 \
      CP rm32x512_v4tgt CP MUXCY_L