/*
 *  mpa_crc.s
 *
 *  MPEG/audio multichannel decoder.
 *	Copyright (C) 2003 Optical Player P/J, Samsung Electronics.
 *
 *===================================================================
 *
 * If the protection bit in the header equals '0', a CRC-check word 
 * has been inserted in the bitstream just after the header. 
 * The error detection method used is 'CRC-16' whose generator 
 * polynomial is:
 *
 *          G(X)  =  X16 + X15 + X2 + 1
 *
 * The bits included into the CRC-check are:
 *	-	16 bits of header(), bitrate_index ~ emphasis
 *	-	a number of bits of audio_data(), starting with the first bit. 
 *	    This number is given by	3-AnnexB,Table 3-B.5 "NUMBER OF 
 *	    PROTECTED AUDIO_DATA BITS". 
 *
 * The method is depicted in 3-Annex A, Figure 3-A.9 "CRC-CHECK DIAGRAM" 
 * The initial state of the shift register is '1111 1111 1111 1111'. 
 * Then all the bits included into the CRC-check are input to the 
 * circuit shown in 3-Annex A, Figure 3-A.9 "CRC-CHECK DIAGRAM". 
 * The outputs b15...b0 constitute a word to be compared with the 
 * CRC-check word in the bitstream. If the words are not identical, 
 * a transmission error has occured in the protected field of the 
 * bitstream. To avoid annoying distortions, application of a 
 * concealment technique, such as muting of the actual frame or 
 * repetition of the previous frame, is recommended.
 *
 */

.include	"mpa.h"

.secFILE_mpa_crc


/********************************************************************

 Function:		update_CRC

 Description:	Update CRC value.
				
				update_CRC (d, b, c) {
				  masking = 1 << length;
				  while((masking >>= 1)) {
				  	carry = *crc & 0x8000;
				  	*crc <<= 1;
				  	if (!carry ^ !(data & masking))
				  		*crc ^= 0x8005;
				  }
				  *crc &= 0xffff;
				}

 Arguments:		b: length
				c: CRC
				d: data
				
				return: c (calculated CRC value)
				
********************************************************************/
update_CRC:
				eld			a, #24
				esub		a, b
				eld			sr, d
				esft		sr, a
				eld			d, sr
				eld			a, #1
				ecld		r0, c
				ld			r2, #0x8005
%1
				ecp			b, #0
				ebra		ec0, return_CRC

				esla		d
				etst		c, ec3
				brad		ec3, %f2
				ld			r1, #1
				ld			r1, #0
%2
				sl			r0				; carry
				adc			r1, #0
				cmp			eq, r1, #1
				brfd		%b1
				esub		b, a
				brad		%b1
				xor			r0, r2
return_CRC
				retd
				ecld		c, r0

		
/********************************************************************

 Function:		MPG_I_CRC_calc

 Description:	Check CRC of base stream of layer I.
					
 Check item:	
				1. bits 16 ... 31 of header
				  update_CRC (bitrate_index, 4, crc);
				  update_CRC (sampling_frequency, 2, crc);
				  update_CRC (padding, 1, crc);
				  update_CRC (extension, 1, crc);
				  update_CRC (mode, 2, crc);
				  update_CRC (mode_ext, 2, crc);
				  update_CRC (copyright, 1, crc);
				  update_CRC (original, 1, crc);
				  update_CRC (emphasis, 2, crc);
                  
				2. bit allocation
				  for (i=0; i<SBLIMIT; i++)
				    for (k=0; k<((i<jsbound)?stereo:1); k++)
				  	  update_CRC (bit_alloc[k][i], 4, crc);
						
********************************************************************/
MPG_I_CRC_calc::
				push		a14
				eld			si, sr						; backup bit_buffer

; 1. bits 16 ... 31 of header
				eld			c, #-1
				efz8		c

				eld			d, rpd0.bitrate_index
				bsrd		update_CRC
				eld			b, #4

				eld			d, rpd0.sampling_frequency
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.padding_bit	
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.private_bit
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.mode
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.mode_extension
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.copyright
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.original
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.emphasis
                bsrd		update_CRC
				eld			b, #2

; 2. bit allocation
;				index registers 
;				@bank1
;						d1		d0		s1		s0
;				---------------------------------------
;				sd1: 	 x		 x		 2   	 1
; 
				er			xsd
				ebk			#0010b
; 				eld			rp1, #bit_alloc		//from layer12.s
				eld			sd1, #0x0021
				
				eld			a, rpd1.stereo
				eld			b, rpd1.jsbound
				ecld		r6, a
				ecld		r7, b
				mul			uu, r6, r7
				sub			r6, #1
				eld			b, #4
%1
				bsrd		update_CRC
				eld			d, @rp1+s0
				bnzd		r6, %b1
				eld			b, #4
				
				cmp			eq, r7, #SBLIMIT
				brt			%f3
				ld			r6, #SBLIMIT
				sub			r6, r7
				sub			r6, #1
%2
				bsrd		update_CRC
				eld			d, @rp1+s1
				bnzd		r6, %b2
				eld			b, #4
%3
				ebk			#0000b
				eld			sr, si						; restore bit_buffer				
				pop			a14
                ret

                
/********************************************************************

 Function:		MPG_II_CRC_calc

 Description:	check CRC of base stream of layer II.
 
 Check item:	
				1. bits 16 ... 31 of header
				  update_CRC (bitrate_index, 4, crc);
				  update_CRC (sampling_frequency, 2, crc);
				  update_CRC (padding, 1, crc);
				  update_CRC (extension, 1, crc);
				  update_CRC (mode, 2, crc);
				  update_CRC (mode_ext, 2, crc);
				  update_CRC (copyright, 1, crc);
				  update_CRC (original, 1, crc);
				  update_CRC (emphasis, 2, crc);
				
				2. bit allocation
				  for (i=0; i<sblimit; i++)
				    for (k=0; k<((i<jsbound)?stereo:1); k++)
				  	  update_CRC (bit_alloc[k][i], (*alloc)[i][0].bits, crc);
				
				3. scalefactor selection information
				  for (i=0; i<sblimit; i++)
				    for (k=0; k<stereo; k++)
				      if (bit_alloc[k][i])
				        update_CRC (scfsi[k][i], 2, crc);
					
********************************************************************/
MPG_II_CRC_calc::	
				push		a14
				eld			si, sr						; backup bit_buffer

; 1. bits 16 ... 31 of header
				eld			c, #-1
				efz8		c

				eld			d, rpd0.bitrate_index
				bsrd		update_CRC
				eld			b, #4

				eld			d, rpd0.sampling_frequency
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.padding_bit
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.private_bit
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.mode
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.mode_extension
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.copyright
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.original
                bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.emphasis
                bsrd		update_CRC
				eld			b, #2
			
; 2. bit allocation
;				index registers 
;				@bank0
;						d1		d0		s1		s0
;				---------------------------------------
;				sd0: 	 x		 x	     0  	 1
;				sd1: 	 x		 x		 2   	 1
; 
				er			xsd
				ebk			#0000b
				eld			sd0, #0x0001
				eld			sd1, #0x0021
				  
				eld			a, rpd1.tbl_num				; select nbal table
				eld			rp0, #nbal_table
				ecp			a, #1						; table number 0/1 or 2/3
				ebra		ec2, 4
				erpn		rp0, #9
				eld			rp1, #bit_alloc
				
				eld			a, rpd1.stereo
				eld			b, rpd1.jsbound
				ecld		r6, a
				ecld		r7, b
				sub			r6, #1
				sub			r7, #1
				ld			r5, r6

%0				eld			b, @rp0+s1				
%1				bsrd		update_CRC
				eld			d, @rp1+s0
				bnzd		r6, %b1
				eld			b, @rp0+s1				

				erps		rp0+s0
				bnzd		r7, %b0
				ld			r6, r5
				
				eld			a, rpd1.jsbound
				eld			b, rpd1.sblimit
				ecp			a, b
				ebrad		ec0, %f3
				ecld		r7, b
				esub		b, a
				ecld		r6, b
				sub			r6, #1
				eld			b, @rp0+s0
%2
				bsrd		update_CRC
				eld			d, @rp1+s1
				bnzd		r6, %b2
				eld			b, @rp0+s0

; 3. scalefactor selection information
%3
				eld			rp0, #scfsi
				eld			rp1, #bit_alloc
				add			r5, #1
				mul			uu, r7, r5
				sub			r7, #1
%4
				eld			a, @rp1+s0
				ecp			a, #0
				ebra		ec0, %f5
				eld			d, @rp0+s1
				bsrd		update_CRC
				eld			b, #2
%5				bnzd		r7, %b4
				erps		rp0+s0
				eld			sr, si						; restore bit_buffer				
				pop			a14
				ret


				
/********************************************************************

 Function:		MC_error_check

 Description:	Check CRC of multichannel stream. This is mandatory
 				option.

 Check item:	
				1. bits of MC header
				2. composite status information
				3. lfe information
				4. bit allocation
				5. scalefactor selection information
 
********************************************************************/
.if( _DECODER_TYPE != MPEG_1_AUDIO )
MC_error_check::
				push		a14
				eld			si, sr						; backup bit_buffer

; 1. bits 0 ... 23 of MC header
				eld			c, #-1
				efz8		c

				eld			d, rpd0.ext_stream_present
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.ext_stream_present
				ecp			d, #TRUE
				ebra		ec1, %f1
				eld			d, rpd0.n_ad_bytes
				bsrd		update_CRC
				eld			b, #8

%1				eld			d, rpd0.center
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.surround
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.lfe
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.audio_mix
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.dematrix_procedure
				bsrd		update_CRC
				eld			b, #2

				eld			d, rpd0.no_of_multi_lingual_ch
				bsrd		update_CRC
				eld			b, #3

				eld			d, rpd0.multi_lingual_fs
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.multi_lingual_layer
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.copyright_ident_bit
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd0.copyright_ident_start
				bsrd		update_CRC
				eld			b, #1

; 2. bits of composite status information
				eld			d, rpd1.tc_sbgr_select
				ecld		r5, d
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd1.dyn_cross_on
				ecld		r6, d
				bsrd		update_CRC
				eld			b, #1

				eld			d, rpd1.mc_prediction_on
				ecld		r7, d
				bsrd		update_CRC
				eld			b, #1

				eld			rp0, #tc_alloc
				ld			r8, #GRANULES
				cmp			eq, r5, #TRUE
				brfd		%f2
				eld			b, rpd1.tc_alloc_bits
				eld			rp0, #layer_info+tc_allocation
				ld			r8, #1
%2				bsrd		update_CRC
				eld			d, @rp0+s0
				dt			r8
				brfd		%b2
				eld			b, rpd1.tc_alloc_bits

				cmp			eq, r6, #TRUE
				brf			%f5
				eld			d, rpd1.dyn_cross_LR
				bsrd		update_CRC
				eld			b, #1
				eld			rp0, #dyn_cross_mode
				eld			rp1, #dyn_second_stereo
				ld			r8, #GRANULES
				eld			b, rpd0.surround
				ecld		r5, b
%3				eld			d, @rp0+s0
				bsrd		update_CRC
				eld			b, rpd1.dyn_cross_bits
				cmp			eq, r5, #3
				brf			%f4
				eld			d, @rp1+s0
				bsrd		update_CRC
				eld			b, #1
%4				dt			r8
				brf			%b3

%5				cmp			eq, r7, #TRUE
				brf			%f6
; CRC for prediction mode
;		for(i = 0; i < 8; i++)
;		{ 	/* new sbgr < 8 */
;			update_CRC(info->mc_prediction[i], 1, crc);
;			if( info->mc_prediction[i] == 1 )
;			{
;			   for(pci=0; pci< pred_coef_table[fr_ps->pred_mode][info->dyn_cross_mode[i]]; pci++)
;				update_CRC(info->mc_predsi[i][pci], 2, crc);
;			}
;		}
				
; 3. bits of lfe information
%6
				eld			a, rpd0.lfe
				ecp			a, #TRUE
				ebra		ec1, %f7
				eld			d, rpd1.lfe_allocation
				bsrd		update_CRC
				eld			b, #4				

; 4. bit allocation
%7
				eld			rp0, #bit_alloc+64
				eld			rp1, #nbal_table				
				eld			a, rpd0.center
				eld			b, rpd0.surround
				ecld		r0, a
				ecld		r1, b
				ld			r9, r0
				ld			r11, r1
				eld			a, rpd1.sblimit_mc
				eld			b, rpd1.mc_channel
				eld			d, rpd1.stereo