?? amux8.lst
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37 ; the CY8C27x66 and CY8C29x66.
38
39 0001 RAM_USE_CLASS_1: equ 1 ; PUSH, POP & I/O access
40 0002 RAM_USE_CLASS_2: equ 2 ; Indexed address mode on stack page
41 0004 RAM_USE_CLASS_3: equ 4 ; Indexed address mode to any page
42 0008 RAM_USE_CLASS_4: equ 8 ; Direct/Indirect address mode access
43
44
45 ; ******* Page Pointer Manipulation Macros *******
46 ;
47 ; Most of the following macros are conditionally compiled so they only
48 ; produce code if the large memory model is selected.
49
50 ;-----------------------------------------------
51 ; Set Stack Page Macro
52 ;-----------------------------------------------
53 ;
54 ; DESC: Modify STK_PP in the large or small memory Models.
55 ;
56 ; INPUT: Constant (e.g., SYSTEM_STACK_PAGE) that specifies the RAM page on
57 ; which stack operations like PUSH and POP store and retrieve their
58 ; data
59 ;
60 ; COST: 8 instruction cycles (in LMM only)
61
62 macro RAM_SETPAGE_STK( PG_NUMBER )
63 IF ( SYSTEM_LARGE_MEMORY_MODEL )
64 mov reg[STK_PP], @PG_NUMBER
65 ENDIF
66 1C5C endm
67
68 ;-----------------------------------------------
69 ; Set Current Page Macro
70 ;-----------------------------------------------
71 ;
72 ; DESC: Modify CUR_PP in the large or small memory Models.
73 ;
74 ; INPUT: Constant value (e.g., >bFoo) for the RAM page number used in
75 ; calculation of effective direct-mode address operands.
76 ;
77 ; COST: 8 instruction cycles (in LMM only)
78
79 macro RAM_SETPAGE_CUR( PG_NUMBER )
80 IF ( SYSTEM_LARGE_MEMORY_MODEL )
81 mov reg[CUR_PP], @PG_NUMBER
82 ENDIF
83 1C5C endm
84
85 ;-----------------------------------------------
86 ; Set Index Page Macro
87 ;-----------------------------------------------
88 ;
89 ; DESC: Modify IDX_PP in the large or small emory Models.
90 ;
91 ; INPUT: Constant value (e.g., >caFoo) for the RAM page number used in
92 ; calculation of effective index-mode address operands.
93 ;
94 ; COST: 8 instruction cycles (in LMM only)
95
96 macro RAM_SETPAGE_IDX( PG_NUMBER )
97 IF ( SYSTEM_LARGE_MEMORY_MODEL )
98 mov reg[IDX_PP], @PG_NUMBER
99 ENDIF
100 1C5C endm
101
102 ;-----------------------------------------------
103 ; Set MVI Read Page Macro
104 ;-----------------------------------------------
105 ;
106 ; DESC: Modify MVR_PP in the large or small memory Models.
107 ;
108 ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in
109 ; calculation of indirect address operands used in the
110 ; "mvi A, [pFoo]" instructions.
111 ;
112 ; COST: 8 instruction cycles (in LMM only)
113
114 macro RAM_SETPAGE_MVR( PG_NUMBER )
115 IF ( SYSTEM_LARGE_MEMORY_MODEL )
116 mov reg[MVR_PP], @PG_NUMBER
117 ENDIF
118 1C5C endm
119
120 ;-----------------------------------------------
121 ; Set MVI Write Page Macro
122 ;-----------------------------------------------
123 ;
124 ; DESC: Modify MVW_PP in the large or small memory Models.
125 ;
126 ; INPUT: Constant value (e.g., >pFoo) for the RAM page number used in
127 ; calculation of indirect address operands used in the
128 ; "mvi [pFoo], A" instructions.
129 ;
130 ; COST: 8 instruction cycles (in LMM only)
131
132 macro RAM_SETPAGE_MVW( PG_NUMBER )
133 IF ( SYSTEM_LARGE_MEMORY_MODEL )
134 mov reg[MVW_PP], @PG_NUMBER
135 ENDIF
136 1C5C endm
137
138 ;-----------------------------------------------
139 ; Force Index Page Pointer to Stack Page
140 ;-----------------------------------------------
141 ;
142 ; DESC: Map index-mode operands onto the stack page by modifying IDX_PP.
143 ; See also RAM_LOCK_INDEX_TO_STACKPAGE.
144 ;
145 ; INPUT: None
146 ;
147 ; COST: 8 instruction cycles (in LMM only)
148
149 macro RAM_SETPAGE_IDX2STK
150 IF ( SYSTEM_LARGE_MEMORY_MODEL )
151 IF ( SYSTEM_MULTIPAGE_STACK )
152 mov A, reg[STK_PP]
153 mov reg[IDX_PP], A
154 ELSE
155 RAM_SETPAGE_IDX SYSTEM_STACK_PAGE
156 ENDIF
157 ENDIF
158 1C5C endm
159
160 ;-----------------------------------------------
161 ; Change Memory Mode
162 ;-----------------------------------------------
163 ;
164 ; DESC: Modify FLAG_PAGEMODE bits in the large and small memory Models.
165 ;
166 ; INPUT: Constant value for PGMODE bitfield of CPU Flag register, F.
167 ; See FLAG_PGMODE_{x} constants in M8C.INC.
168 ;
169 ; COST: 8 instruction cycles (in LMM only)
170
171 macro RAM_CHANGE_PAGE_MODE( MODE )
172 IF ( SYSTEM_LARGE_MEMORY_MODEL )
173 and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
174 or F, FLAG_PGMODE_MASK & @MODE
175 ENDIF
176 1C5C endm
177
178 ;-----------------------------------------------
179 ; Set Large Memory Model Native Paging Mode
180 ;-----------------------------------------------
181 ;
182 ; DESC: Changes the FLAG_PAGEMODE bits to enter the native LMM RAM
183 ; paging mode *IFF* a simple "OR" is guaranteed to work---for
184 ; example, in an ISR, when the PGMODE bits have been cleared
185 ; to zero. If a simple "OR" is not guaranteed to work, use
186 ; the slower RAM_RESTORE_NATIVE_PAGING instead.
187 ;
188 ; INPUT: none
189 ;
190 ; COST: 4 instruction cycles (in LMM only)
191
192 macro RAM_SET_NATIVE_PAGING
193 IF ( SYSTEM_LARGE_MEMORY_MODEL )
194 IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
195 or F, FLAG_PGMODE_11b ; LMM w/ IndexPage<==>StackPage
196 ENDIF ; PGMODE LOCKED
197 IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
198 or F, FLAG_PGMODE_10b ; LMM with independent IndexPage
199 ENDIF ; PGMODE FREE
200 ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
201 1C5C endm
202
203 ;--------------------?? 快捷鍵說明
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