;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME: EzI2CsINT.asm
;;  Version: 1.1, Updated on 2008/10/2 at 14:38:50
;;  Generated by PSoC Designer ???
;;
;;  DESCRIPTION: I2CFXM (Slave) Interrupt Service Routine
;;  
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************
include "EzI2Cs.inc"
include "m8c.inc"
include "memory.inc"




;-----------------------------------------------
;  Global Symbols
;-----------------------------------------------

export    EzI2Cs_varPage      
export   _EzI2Cs_varPage      

export    EzI2Cs_bState  
export   _EzI2Cs_bState

export    EzI2Cs_bRAM_RWoffset
export   _EzI2Cs_bRAM_RWoffset

export    EzI2Cs_bRAM_RWcntr
export   _EzI2Cs_bRAM_RWcntr

export   _EzI2Cs_pRAM_Buf_Addr_LSB
export    EzI2Cs_pRAM_Buf_Addr_LSB

IF (SYSTEM_LARGE_MEMORY_MODEL)
export   _EzI2Cs_pRAM_Buf_Addr_MSB
export    EzI2Cs_pRAM_Buf_Addr_MSB
ENDIF

export   _EzI2Cs_bRAM_Buf_Size                                
export    EzI2Cs_bRAM_Buf_Size    

export   _EzI2Cs_bRAM_Buf_WSize               
export    EzI2Cs_bRAM_Buf_WSize  

IF (EzI2Cs_ROM_ENABLE)
export    EzI2Cs_bROM_RWoffset
export   _EzI2Cs_bROM_RWoffset

export    EzI2Cs_bROM_RWcntr   
export   _EzI2Cs_bROM_RWcntr   

export   _EzI2Cs_pROM_Buf_Addr_LSB
export    EzI2Cs_pROM_Buf_Addr_LSB
export   _EzI2Cs_pROM_Buf_Addr_MSB
export    EzI2Cs_pROM_Buf_Addr_MSB

export   _EzI2Cs_bROM_Buf_Size                           
export    EzI2Cs_bROM_Buf_Size

ENDIF


AREA InterruptRAM (RAM, REL, CON)

;-----------------------------------------------
; Variable Allocation
;-----------------------------------------------


;; Exported variables
 _EzI2Cs_varPage:                                  ; This points to the variable page
  EzI2Cs_varPage:          

 _EzI2Cs_bState:
  EzI2Cs_bState:                             blk 1

;; RAM space variables
 _EzI2Cs_bRAM_RWoffset:                            ; RAM address counter.  This is reset each time
  EzI2Cs_bRAM_RWoffset:                      blk 1 ; a read or write is initiated.

 _EzI2Cs_bRAM_RWcntr:                              ; RAM Read/Write counter.  Keeps track of offset 
  EzI2Cs_bRAM_RWcntr:                        blk 1 ; during a read or write operation.  Reset to
                                                      ; _bRAM_RWoffset at start of R/W command.

IF (SYSTEM_LARGE_MEMORY_MODEL)
 _EzI2Cs_pRAM_Buf_Addr_MSB:                        ; Base address (MSB) to RAM buffer.  
  EzI2Cs_pRAM_Buf_Addr_MSB:                  blk 1 ; 
ENDIF

 _EzI2Cs_pRAM_Buf_Addr_LSB:                        ; Base address (LSB) to RAM buffer.  
  EzI2Cs_pRAM_Buf_Addr_LSB:                  blk 1 ; 

 _EzI2Cs_bRAM_Buf_Size:                            ; Size of RAM buffer.   
  EzI2Cs_bRAM_Buf_Size:                      blk 1 ; 

 _EzI2Cs_bRAM_Buf_WSize:                           ; Portion of the RAM buffer size that is writable.
  EzI2Cs_bRAM_Buf_WSize:                     blk 1 ; 

;; ROM space variables
IF (EzI2Cs_ROM_ENABLE)
 _EzI2Cs_bROM_RWoffset:                            ; ROM address counter.  This is reset each time
  EzI2Cs_bROM_RWoffset:                      blk 1 ; a read is initiated

 _EzI2Cs_bROM_RWcntr:                              ; ROM read counter. Keeps track of offset 
  EzI2Cs_bROM_RWcntr:                        blk 1 ; during a read operation.  Reset to
                                                      ; _bRAM_RWoffset at start of command.

 _EzI2Cs_pROM_Buf_Addr_MSB:                        ; ROM address (MSB) counter. (Relative to buffer)  This
  EzI2Cs_pROM_Buf_Addr_MSB:                  blk 1 ; counter is reset each time a read is initiated.

 _EzI2Cs_pROM_Buf_Addr_LSB:                        ; ROM address (MSB) counter. (Relative to buffer)  This
  EzI2Cs_pROM_Buf_Addr_LSB:                  blk 1 ; counter is reset each time a read is initiated.

 _EzI2Cs_bROM_Buf_Size:                            ; Size of RAM buffer.                            
  EzI2Cs_bROM_Buf_Size:                      blk 1 ; 

ENDIF

IF (EzI2Cs_DYNAMIC_ADDR) 

export    EzI2Cs_bAddr
export   _EzI2Cs_bAddr 

 _EzI2Cs_bAddr:
  EzI2Cs_bAddr:                              blk 1
ENDIF

;-----------------------------------------------
;  EQUATES and TABLES
;-----------------------------------------------

;; Bit definitions for EzI2Cs_bState
STATE_IDLE:         equ  0x00      ; Wait for Correct Address
STATE_WR_RAM_ADDR:  equ  0x02      ; Wait for Secondary address on write
STATE_WR_RAM:       equ  0x04      ; Write RAM Data
STATE_RD_RAM:       equ  0x06      ; Read RAM Data

STATE_WR_ROM_ADDR:  equ  0x08      ; Wait for Secondary address on write
STATE_RD_ROM:       equ  0x0A      ; Read ROM Data

STATE_WR_ROM:       equ  0x0C      ; Write ROM (Not supported at this time)
STATE_RESET:        equ  0x0E      ; Reset state machine

STATE_MASK:         equ  0x0E
STATE_MASK2:        equ  0x0F      ; State Mask

ALT_MODE_FLAG:      equ  0x40      ; Reserved


;@PSoC_UserCode_INIT@ (Do not change this line.)
;---------------------------------------------------
; Insert your custom declarations below this banner
;---------------------------------------------------

;------------------------
;  Constant Definitions
;------------------------


;------------------------
; Variable Allocation
;------------------------

;; Required for I2C Flash interface.
export   _EzI2Cs_bFLASH_CMD
export    EzI2Cs_bFLASH_CMD
export   _EzI2Cs_bFLASH_Param
export    EzI2Cs_bFLASH_Param

 _EzI2Cs_bFLASH_CMD:                               ; Flash command sent
  EzI2Cs_bFLASH_CMD:                         blk 1 ;
 _EzI2Cs_bFLASH_Param:                             ; Flash Parameter sent
  EzI2Cs_bFLASH_Param:                       blk 1 ;

;---------------------------------------------------
; Insert your custom declarations above this banner
;---------------------------------------------------
;@PSoC_UserCode_END@ (Do not change this line.)




AREA UserModules (ROM, REL, CON)

export _EzI2Cs_ISR
;;****************************************************
;; I2C_ISR  main entry point from vector 60h
;;
;;****************************************************

 EzI2Cs_ISR:
_EzI2Cs_ISR:

    push A
    push X

;; The folling conditional code is only valid when using the
;; large memory model.
IF (SYSTEM_LARGE_MEMORY_MODEL)
   RAM_CHANGE_PAGE_MODE FLAG_PGMODE_2              ; Set Page Mode
   REG_PRESERVE IDX_PP                             ; Save Index Page Pointer
   REG_PRESERVE CUR_PP                             ; Save Current Page Pointer
   RAM_SETPAGE_CUR  >EzI2Cs_varPage      ; Set the current page mode Pointer
   mov   A, [EzI2Cs_pRAM_Buf_Addr_MSB]   ; Set Index page mode pointer
   RAM_SETPAGE_IDX A
ENDIF

    or   [EzI2Cs_bState],EzI2Cs_ANY_ACTIVITY                         ; Set Activity flag
    ; Check for Stop condition here.  If a stop condition
    ; exists, reset state machine to idle.
    tst  reg[EzI2Cs_SCR_REG],EzI2Cs_SCR_ADDRESS                      ; Check for address
    jz   .I2C_DO_STATE_MACHINE
    and  [EzI2Cs_bState],~STATE_MASK2                                ; Clear State bits.                       
    or   [EzI2Cs_bState],STATE_IDLE                                  ; Address flag set, change to IDLE state

.I2C_DO_STATE_MACHINE:
    mov  A,[EzI2Cs_bState]    ; Get State
    and  A,STATE_MASK                   ; Mask off invalid states
    jacc I2C_STATE_JUMP_TABLE

I2C_STATE_JUMP_TABLE:
    jmp  I2C_STATE_IDLE                 ; Idle state
    jmp  I2C_STATE_WR_RAM_ADDR              ; Wait for Address write state
    jmp  I2C_STATE_WR_RAM               ; 
    jmp  I2C_STATE_RD_RAM
IF (EzI2Cs_ROM_ENABLE)        ; Only valid if ROM enabled
    jmp  I2C_STATE_WR_ROM_ADDR
    jmp  I2C_STATE_RD_ROM
    jmp  I2C_STATE_WR_ROM
ELSE
    jmp  I2C_STATE_RESET
    jmp  I2C_STATE_RESET
    jmp  I2C_STATE_RESET
ENDIF
    jmp  I2C_STATE_RESET

    jmp  EzI2Cs_ISR_END