;******************************************************************************
;  MSP430F20xx - I2C Master Transmitter and Receiver
;
;  Description: This code library configures the MSP430 as an I2C master device
;  capable of transmitting and receiving bytes. 
;
;  ***THIS IS THE MASTER CODE***
;
;                    Master                   
;               MSP430F20x2/3             
;             -----------------          
;         /|\|              XIN|-   
;          | |                 |     
;          --|RST          XOUT|-    
;            |                 |        
;            |                 |        
;            |                 |       
;            |         SDA/P1.7|------->
;            |         SCL/P1.6|------->
;
;  Note: Internal pull-ups are used for SDA & SCL
;
;  P. Thanigai
;  Texas Instruments Inc.
;  August 2007
;  Built with IAR Embedded Workbench Version: 3.42A
;******************************************************************************
#include  <msp430x20x2.h>
; 
; Note:
; The USE_C_CONTEXT_SAVE macro is used when C functions are called from the
; library. The macro preserves registers R13 - R15 which may be corrupted
; during a C function call. If the called function is in assembler the 
; macro need not be used.
;# define USE_C_CONTEXT_SAVE 

            MODULE    TI_USI_I2C_MASTER
            RTMODEL   "__rt_version", "2"   ; Ensure correct runtime model
            ;Functions
            PUBLIC    TI_USI_I2C_MasterInit
            PUBLIC    TI_USI_I2CSelect
            PUBLIC    TI_USI_I2CRead
            PUBLIC    TI_USI_I2CWrite
            PUBLIC    TI_USI_I2CStop

            RSEG      DATA16_N
            EVEN
TI_I2CState   DS      2
TI_FuncPtr    DS      2
TI_TxPtr      DS      2
TI_RxPtr      DS      2
TI_SlavAdd    DS      1
TI_ByteCtr    DS      1
TI_TxWordCtr  DS      1
TI_AckPoll    DS      1
TI_StopBit    DS      1
TI_GenStop    DS      1
TI_AckResult  DS      1

            RSEG    CODE                    ; Assemble to Flash memory
            EVEN
;==============================================================================
; Initialize USI module
;==============================================================================
; void TI_USI_I2C_MasterInit(unsigned char ClockConfig, 
; int(*StatusCallback)(unsigned char))
;
; Function to initialize the USI module in Master mode and enable I2C
; communication. The clock configuration is passed as an argument.
;
; IN:      R12     Clock configuration  USIDIV_x+USISSEL_x+USICKPL
;          R14     Callback function pointer
;------------------------------------------------------------------------------
TI_USI_I2C_MasterInit
            bis.b   #0xC0,&P1OUT
            bis.b   #0xC0,&P1REN            ; Internal pullups enable
SetupUSI    mov.b   R12,&USICKCTL           ; Initialize clock config
            mov.b   #USIPE6+USIPE7+USIMST+USISWRST,&USICTL0; Port, I2C master
            mov.b   #USIIE+USII2C,&USICTL1  ; Enable I2C & USI interrupt
            mov.b   #USIIFGCC,&USICNT       ; Disable automatic clear control
            bic.b   #USISWRST,&USICTL0      ; Enable USI
            bic.b   #USIIFG,&USICTL1        ; Clear pending flag
            mov.w   R14,&TI_FuncPtr         ; Initialize callback fn. pointer
            ret

;------------------------------------------------------------------------------
; void TI_USI_I2CStop(void)
;
; The function is used to end an open transaction by generating a stop condition
;
;------------------------------------------------------------------------------
TI_USI_I2CStop
            clr.b   &TI_AckPoll             ; Do not poll
            clr.b   &TI_StopBit             ; Do not exit w/o stop
            mov.b   #1,&TI_GenStop          ; Generate stop bit
            jmp     BlockingMode

;------------------------------------------------------------------------------
; unsigned char TI_USI_I2CSelect(unsigned char SlaveAddress)
;
; Function is used to check the presence of a slave and polls for an acknowledge
; from the slave
;
;  IN:      R12    Slave Address
;  OUT:     R12    Result of operation - ack/nack
;
;------------------------------------------------------------------------------
            
TI_USI_I2CSelect  
            clr.b   &TI_StopBit             ; Do not exit w/o stop
            clr.b   &TI_GenStop
            clr.w   &TI_I2CState            ; Initialize state machine
            rla.b   R12                     ; Slave address << 1
            mov.b   R12,&TI_SlavAdd         ; Initialize slave address
            mov.b   #1,TI_AckPoll           ; Set acknowledge poll bit
            jmp     BlockingMode                         
; -----------------------------------------------------------------------------
; unsigned char TI_USI_I2CRead(unsigned char SlaveAddress, unsigned int Length,
; unsigned char Multi, unsigned char* RxData)
; 
; Function implements block read master reciever functionality
;
;  IN:     R12      Slave Address
;          R14      Length of transaction / no. of bytes 
;          SP 1     Stop condition bit
;          SP 2     Pointer to store received data (RAM)
;  OUT:    R12      Result of operation (Blocking mode only)
;------------------------------------------------------------------------------
TI_USI_I2CRead
            clr.b   &TI_AckPoll             ; Do not poll
            clr.b   &TI_GenStop
            mov.b   2(SP),&TI_StopBit       ; Stop condn bit initialize
            mov.w   4(SP),&TI_RxPtr         ; Transmit buffer initialize
            clr.w   &TI_I2CState            ; Initialize state machine
            rla.b   R12                     ; Left shift SA + 1 = Read fn.
            inc.b   R12
            mov.b   R12,&TI_SlavAdd         ; Slave address initialize
            mov.b   R14,&TI_ByteCtr         ; Save no. of bytes to rx ptr
            jmp     Mainloop
; -----------------------------------------------------------------------------
; unsigned char TI_USI_I2CWrite(unsigned char SlaveAddress, unsigned int Length,
; unsigned char Multi, unsigned char* TxData)
; 
; Function implements block byte write master transmitter functionality
;
;  IN:     R12      Slave Address
;          R14      Length of transaction / no. of bytes
;          SP 1     Stop condition bit
;          SP 2     Pointer to transmit data (RAM)
;  OUT:    R12      Result of operation (Blocking mode only)
;------------------------------------------------------------------------------
TI_USI_I2CWrite 
            clr.b   &TI_AckPoll             ; Do not poll
            clr.b   &TI_GenStop
            mov.b   2(SP),&TI_StopBit       ; Stop condn bit initialize 
            mov.w   4(SP),&TI_TxPtr         ; Transmit buffer initialize
            clr.w   &TI_I2CState            ; Initialize state machine
            rla.b   R12                     ; Left shift + 0 = Write fn.
            mov.b   R12,&TI_SlavAdd         ; Slave address initialize
            mov.b   R14,&TI_ByteCtr         ; Initialize tx counter
Mainloop    
            cmp.w   #0,&TI_FuncPtr          ; chk if callback fn pointer exists
            jz      BlockingMode            
            bis.b   #USIIFG,&USICTL1        ; If yes - return to appln. level
            clr.w   R12                     ; Return value is undefined
            ret

BlockingMode
            dint
            bis.b   #USIIFG,&USICTL1        ; Blocking fashion, stay in library
            bis.w   #LPM0+GIE,SR            ; Enter LPM0, enable interrupts
exitloop    ret

;------------------------------------------------------------------------------
USI_ISR;
;------------------------------------------------------------------------------