/******************************************************************************\* _____________________* |                   |* |  S R C            |* |  Q S R C          |* |  Q S S R C        |* |___________________|** SRC    - source address parameter* QSRC   - QDMA source address register* QSSRC  - QDMA source address pseudo register** FIELDS (msb -> lsb)* (rw) SRC*\******************************************************************************/  #define _EDMA_SRC_OFFSET             1  #define _EDMA_QSRC_OFFSET            1  #define _EDMA_QSSRC_OFFSET           9  #define _EDMA_QSRC_ADDR              0x02000004u  #define _EDMA_QSSRC_ADDR             0x02000024u  #define  EDMA_QSRC                   EDMA_REG(QSRC)  #define  EDMA_QSSRC                  EDMA_REG(QSSRC)  #define _EDMA_SRC_SRC_MASK           0xFFFFFFFFu  #define _EDMA_SRC_SRC_SHIFT          0x00000000u  #define  EDMA_SRC_SRC_DEFAULT        0x00000000u  #define  EDMA_SRC_SRC_OF(x)          _VALUEOF(x)  #define  EDMA_SRC_OF(x)              _VALUEOF(x)  #define EDMA_SRC_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,SRC,SRC)\  )  #define EDMA_SRC_RMK(src) (Uint32)(\     _PER_FMK(EDMA,SRC,SRC,src) \  )  #define _EDMA_QSRC_FGET(FIELD)\    _PER_FGET(_EDMA_QSRC_ADDR,EDMA,SRC,##FIELD)  #define _EDMA_QSRC_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSRC_ADDR,EDMA,SRC,##FIELD,field)  #define _EDMA_QSRC_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSRC_ADDR,EDMA,SRC,##FIELD,##SYM)  #define _EDMA_QSSRC_FGET(FIELD)\    _PER_FGET(_EDMA_QSSRC_ADDR,EDMA,SRC,##FIELD)  #define _EDMA_QSSRC_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSSRC_ADDR,EDMA,SRC,##FIELD,field)  #define _EDMA_QSSRC_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSSRC_ADDR,EDMA,SRC,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  C N T            |* |  Q C N T          |* |  Q S C N T        |* |___________________|** CNT    - transfer count parameter* QCNT   - QDMA transfer count register* QSCNT  - QDMA transfer count pseudo register** FIELDS (msb -> lsb)* (rw) FRMCNT* (rw) ELECNT*\******************************************************************************/  #define _EDMA_CNT_OFFSET             2  #define _EDMA_QCNT_OFFSET            2  #define _EDMA_QSCNT_OFFSET           10  #define _EDMA_QCNT_ADDR              0x02000008u  #define _EDMA_QSCNT_ADDR             0x02000028u  #define  EDMA_QCNT                   EDMA_REG(QCNT)  #define  EDMA_QSCNT                  EDMA_REG(QSCNT)  #define _EDMA_CNT_FRMCNT_MASK        0xFFFF0000u  #define _EDMA_CNT_FRMCNT_SHIFT       0x00000010u  #define  EDMA_CNT_FRMCNT_DEFAULT     0x00000000u  #define  EDMA_CNT_FRMCNT_OF(x)       _VALUEOF(x)  #define _EDMA_CNT_ELECNT_MASK        0x0000FFFFu  #define _EDMA_CNT_ELECNT_SHIFT       0x00000000u  #define  EDMA_CNT_ELECNT_DEFAULT     0x00000000u  #define  EDMA_CNT_ELECNT_OF(x)       _VALUEOF(x)  #define  EDMA_CNT_OF(x)              _VALUEOF(x)  #define EDMA_CNT_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,CNT,FRMCNT)\    |_PER_FDEFAULT(EDMA,CNT,ELECNT)\  )  #define EDMA_CNT_RMK(frmcnt,elecnt) (Uint32)(\     _PER_FMK(EDMA,CNT,FRMCNT,frmcnt) \    |_PER_FMK(EDMA,CNT,ELECNT,elecnt) \  )  #define _EDMA_QCNT_FGET(FIELD)\    _PER_FGET(_EDMA_QCNT_ADDR,EDMA,CNT,##FIELD)  #define _EDMA_QCNT_FSET(FIELD,field)\    _PER_FSET(_EDMA_QCNT_ADDR,EDMA,CNT,##FIELD,field)  #define _EDMA_QCNT_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QCNT_ADDR,EDMA,CNT,##FIELD,##SYM)  #define _EDMA_QSCNT_FGET(FIELD)\    _PER_FGET(_EDMA_QSCNT_ADDR,EDMA,CNT,##FIELD)  #define _EDMA_QSCNT_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSCNT_ADDR,EDMA,CNT,##FIELD,field)  #define _EDMA_QSCNT_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSCNT_ADDR,EDMA,CNT,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  D S T            |* |  Q D S T          |* |  Q S D S T        |* |___________________|** DST    - destination address parameter* QDST   - QDMA destination address register* QSDST  - QDMA destination address pseudo register** FIELDS (msb -> lsb)* (rw) DST*\******************************************************************************/  #define _EDMA_DST_OFFSET             3  #define _EDMA_QDST_OFFSET            3  #define _EDMA_QSDST_OFFSET           11  #define _EDMA_QDST_ADDR              0x0200000Cu  #define _EDMA_QSDST_ADDR             0x0200002Cu  #define  EDMA_QDST                   EDMA_REG(QDST)  #define  EDMA_QSDST                  EDMA_REG(QSDST)  #define _EDMA_DST_DST_MASK           0xFFFFFFFFu  #define _EDMA_DST_DST_SHIFT          0x00000000u  #define  EDMA_DST_DST_DEFAULT        0x00000000u  #define  EDMA_DST_DST_OF(x)          _VALUEOF(x)  #define  EDMA_DST_OF(x)              _VALUEOF(x)  #define EDMA_DST_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,DST,DST)\  )  #define EDMA_DST_RMK(dst) (Uint32)(\     _PER_FMK(EDMA,DST,DST,dst) \  )  #define _EDMA_QDST_FGET(FIELD)\    _PER_FGET(_EDMA_QDST_ADDR,EDMA,DST,##FIELD)  #define _EDMA_QDST_FSET(FIELD,field)\    _PER_FSET(_EDMA_QDST_ADDR,EDMA,DST,##FIELD,field)  #define _EDMA_QDST_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QDST_ADDR,EDMA,DST,##FIELD,##SYM)  #define _EDMA_QSDST_FGET(FIELD)\    _PER_FGET(_EDMA_QSDST_ADDR,EDMA,DST,##FIELD)  #define _EDMA_QSDST_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSDST_ADDR,EDMA,DST,##FIELD,field)  #define _EDMA_QSDST_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSDST_ADDR,EDMA,DST,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  I D X            |* |  Q I D X          |* |  Q S I D X        |* |___________________|** IDX    - index parameter* QIDX   - QDMA index register* QSIDX  - QDMA index pseudo register** FIELDS (msb -> lsb)* (rw) FRMIDX* (rw) ELEIDX*\******************************************************************************/  #define _EDMA_IDX_OFFSET             4  #define _EDMA_QIDX_OFFSET            4  #define _EDMA_QSIDX_OFFSET           12  #define _EDMA_QIDX_ADDR              0x02000010u  #define _EDMA_QSIDX_ADDR             0x02000030u  #define  EDMA_QIDX                   EDMA_REG(QIDX)  #define  EDMA_QSIDX                  EDMA_REG(QSIDX)  #define _EDMA_IDX_FRMIDX_MASK        0xFFFF0000u  #define _EDMA_IDX_FRMIDX_SHIFT       0x00000010u  #define  EDMA_IDX_FRMIDX_DEFAULT     0x00000000u  #define  EDMA_IDX_FRMIDX_OF(x)       _VALUEOF(x)  #define _EDMA_IDX_ELEIDX_MASK        0x0000FFFFu  #define _EDMA_IDX_ELEIDX_SHIFT       0x00000000u  #define  EDMA_IDX_ELEIDX_DEFAULT     0x00000000u  #define  EDMA_IDX_ELEIDX_OF(x)       _VALUEOF(x)  #define  EDMA_IDX_OF(x)              _VALUEOF(x)  #define EDMA_IDX_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,IDX,FRMIDX)\    |_PER_FDEFAULT(EDMA,IDX,ELEIDX)\  )  #define EDMA_IDX_RMK(frmidx,eleidx) (Uint32)(\     _PER_FMK(EDMA,IDX,FRMIDX,frmidx) \    |_PER_FMK(EDMA,IDX,ELEIDX,eleidx) \  )  #define _EDMA_QIDX_FGET(FIELD)\    _PER_FGET(_EDMA_QIDX_ADDR,EDMA,IDX,##FIELD)  #define _EDMA_QIDX_FSET(FIELD,field)\    _PER_FSET(_EDMA_QIDX_ADDR,EDMA,IDX,##FIELD,field)  #define _EDMA_QIDX_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QIDX_ADDR,EDMA,IDX,##FIELD,##SYM)  #define _EDMA_QSIDX_FGET(FIELD)\    _PER_FGET(_EDMA_QSIDX_ADDR,EDMA,IDX,##FIELD)  #define _EDMA_QSIDX_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSIDX_ADDR,EDMA,IDX,##FIELD,field)  #define _EDMA_QSIDX_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSIDX_ADDR,EDMA,IDX,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  R L D            |* |  Q R L D          |* |  Q S R L D        |* |___________________|** RLD - count reload/link parameter** FIELDS (msb -> lsb)* (rw) ELECNT* (rw) LINK*\******************************************************************************/  #define _EDMA_RLD_OFFSET             5  #define _EDMA_QRLD_OFFSET            5  #define _EDMA_QSRLD_OFFSET           13  #define _EDMA_QRLD_ADDR              0x02000014u  #define _EDMA_QSRLD_ADDR             0x02000034u  #define  EDMA_QRLD                   EDMA_REG(QRLD)  #define  EDMA_QSRLD                  EDMA_REG(QSRLD)  #define _EDMA_RLD_ELERLD_MASK        0xFFFF0000u  #define _EDMA_RLD_ELERLD_SHIFT       0x00000010u  #define  EDMA_RLD_ELERLD_DEFAULT     0x00000000u  #define  EDMA_RLD_ELERLD_OF(x)       _VALUEOF(x)  #define _EDMA_RLD_LINK_MASK          0x0000FFFFu  #define _EDMA_RLD_LINK_SHIFT         0x00000000u  #define  EDMA_RLD_LINK_DEFAULT       0x00000000u  #define  EDMA_RLD_LINK_OF(x)         _VALUEOF(x)  #define  EDMA_RLD_OF(x)              _VALUEOF(x)  #define EDMA_RLD_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,RLD,ELERLD)\    |_PER_FDEFAULT(EDMA,RLD,LINK)\  )  #define EDMA_RLD_RMK(elerld,link) (Uint32)(\     _PER_FMK(EDMA,RLD,ELERLD,elerld) \    |_PER_FMK(EDMA,RLD,LINK,link) \  )  #define _EDMA_QRLD_FGET(FIELD)\    _PER_FGET(_EDMA_QRLD_ADDR,EDMA,RLD,##FIELD)  #define _EDMA_QRLD_FSET(FIELD,field)\    _PER_FSET(_EDMA_QRLD_ADDR,EDMA,RLD,##FIELD,field)  #define _EDMA_QRLD_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QRLD_ADDR,EDMA,RLD,##FIELD,##SYM)  #define _EDMA_QSRLD_FGET(FIELD)\    _PER_FGET(_EDMA_QSRLD_ADDR,EDMA,RLD,##FIELD)  #define _EDMA_QSRLD_FSET(FIELD,field)\    _PER_FSET(_EDMA_QSRLD_ADDR,EDMA,RLD,##FIELD,field)  #define _EDMA_QSRLD_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_QSRLD_ADDR,EDMA,RLD,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  P Q S R          |* |___________________|** PQSR - priority queue status register** FIELDS (msb -> lsb)* (r) PQ*\******************************************************************************/  #define _EDMA_PQSR_ADDR              0x01A0FFE0u  #define  EDMA_PQSR                   EDMA_REG(PQSR)#if (C64_SUPPORT)  #define _EDMA_PQSR_PQ_MASK           0x0000000Fu  #define _EDMA_PQSR_PQ_SHIFT          0x00000000u  #define  EDMA_PQSR_PQ_DEFAULT        0x0000000Fu  #define  EDMA_PQSR_PQ_OF(x)          _VALUEOF(x)#else  #define _EDMA_PQSR_PQ_MASK           0x00000007u  #define _EDMA_PQSR_PQ_SHIFT          0x00000000u  #define  EDMA_PQSR_PQ_DEFAULT        0x00000007u  #define  EDMA_PQSR_PQ_OF(x)          _VALUEOF(x)#endif  #define  EDMA_PQSR_OF(x)             _VALUEOF(x)  #define EDMA_PQSR_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,PQSR,PQ)\  ) #if (!(CHIP_6410 | CHIP_6413 | CHIP_6418))  #define EDMA_PQSR_RMK(pq) (Uint32)(\     _PER_FMK(EDMA,PQSR,PQ,pq)\  ) #endif    #define _EDMA_PQSR_FGET(FIELD)\    _PER_FGET(_EDMA_PQSR_ADDR,EDMA,PQSR,##FIELD)  #define _EDMA_PQSR_FSET(FIELD,field)\    _PER_FSET(_EDMA_PQSR_ADDR,EDMA,PQSR,##FIELD,field)  #define _EDMA_PQSR_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_PQSR_ADDR,EDMA,PQSR,##FIELD,##SYM)/******************************************************************************\* _____________________* |                   |* |  P Q A R 0        |* |___________________|** PQAR0 - priority queue allocation register 0** FIELDS (msb -> lsb)* (r) PQA*\******************************************************************************/  #if (C64_SUPPORT)  #define _EDMA_PQAR0_ADDR              0x01A0FFC0u  #define  EDMA_PQAR0                   EDMA_REG(PQAR0)  #define _EDMA_PQAR0_PQA_MASK           0x00000007u  #define _EDMA_PQAR0_PQA_SHIFT          0x00000000u  #define  EDMA_PQAR0_PQA_DEFAULT        0x00000002u  #define  EDMA_PQAR0_PQA_OF(x)          _VALUEOF(x)  #define  EDMA_PQAR0_OF(x)             _VALUEOF(x)  #define EDMA_PQAR0_DEFAULT (Uint32)(\     _PER_FDEFAULT(EDMA,PQAR0,PQA)\  )  #if (!(CHIP_6418 | CHIP_6413 | CHIP_6410))    #define EDMA_PQAR0_RMK(pqa) (Uint32)(\       _PER_FMK(EDMA,PQAR0,PQA,pqa)\    )    #endif  #define _EDMA_PQAR0_FSET(FIELD,field)\    _PER_FSET(_EDMA_PQAR0_ADDR,EDMA,PQAR0,FIELD,field)  #define _EDMA_PQAR0_FSETS(FIELD,SYM)\    _PER_FSETS(_EDMA_PQAR0_ADDR,EDMA,PQAR0,FIELD,##SYM)  #define _EDMA_PQAR0_FGET(FIELD)\    _PER_FGET(_EDMA_PQAR0_ADDR,EDMA,PQAR0,FIELD)#endif/******************************************************************************\* _____________________* |                   |* |  P Q A R 1        |* |___________________|** PQAR1 - priority queue allocation register 1** FIELDS (msb -> lsb)* (r) PQA*\******************************************************************************/  #if (C64_SUPPORT)  #define _EDMA_PQAR1_ADDR              0x01A0FFC4u  #define  EDMA_PQAR1                   EDMA_REG(PQAR1)  #define _EDMA_PQAR1_PQA_MASK           0x00000007u  #define _EDMA_PQAR1_PQA_SHIFT          0x00000000u  #define  EDMA_PQAR1_PQA_DEFAULT        0x00000006u  #define  EDMA_PQAR1_PQA_OF(x)          _VALUEOF(x)  #define  EDMA_PQAR1_OF(x)             _VALUEOF(x)