?? csl_edmahal.h
字號:
* CCERL - channel chain enable register, low half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) CCE*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_CCERL_ADDR 0x01A0FFECu #define EDMA_CCERL EDMA_REG(CCERL) #define _EDMA_CCERL_CCE_MASK 0xFFFFFFFFu #define _EDMA_CCERL_CCE_SHIFT 0x00000000u #define EDMA_CCERL_CCE_DEFAULT 0x00000000u #define EDMA_CCERL_CCE_OF(x) _VALUEOF(x) #define EDMA_CCERL_OF(x) _VALUEOF(x) #define EDMA_CCERL_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,CCERL,CCE)\ ) #define EDMA_CCERL_RMK(cce) (Uint32)(\ _PER_FMK(EDMA,CCERL,CCE,cce)\ ) #define _EDMA_CCERL_FGET(FIELD)\ _PER_FGET(_EDMA_CCERL_ADDR,EDMA,CCERL,##FIELD) #define _EDMA_CCERL_FSET(FIELD,field)\ _PER_FSET(_EDMA_CCERL_ADDR,EDMA,CCERL,##FIELD,field) #define _EDMA_CCERL_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_CCERL_ADDR,EDMA,CCERL,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | C C E R H |* |___________________|** CCERH - channel chain enable register, high half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) CCE*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_CCERH_ADDR 0x01A0FFACu #define EDMA_CCERH EDMA_REG(CCERH) #define _EDMA_CCERH_CCE_MASK 0xFFFFFFFFu #define _EDMA_CCERH_CCE_SHIFT 0x00000000u #define EDMA_CCERH_CCE_DEFAULT 0x00000000u #define EDMA_CCERH_CCE_OF(x) _VALUEOF(x) #define EDMA_CCERH_OF(x) _VALUEOF(x) #define EDMA_CCERH_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,CCERH,CCE)\ ) #define EDMA_CCERH_RMK(cce) (Uint32)(\ _PER_FMK(EDMA,CCERH,CCE,cce)\ ) #define _EDMA_CCERH_FGET(FIELD)\ _PER_FGET(_EDMA_CCERH_ADDR,EDMA,CCERH,##FIELD) #define _EDMA_CCERH_FSET(FIELD,field)\ _PER_FSET(_EDMA_CCERH_ADDR,EDMA,CCERH,##FIELD,field) #define _EDMA_CCERH_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_CCERH_ADDR,EDMA,CCERH,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | E R |* |___________________|** ER - event register** FIELDS (msb -> lsb)* (r) EVT*\******************************************************************************/ #define _EDMA_ER_ADDR 0x01A0FFF0u #define EDMA_ER EDMA_REG(ER)#if (C64_SUPPORT) #define _EDMA_ER_EVT_MASK 0xFFFFFFFFu #define _EDMA_ER_EVT_SHIFT 0x00000000u #define EDMA_ER_EVT_DEFAULT 0x00000000u #define EDMA_ER_EVT_OF(x) _VALUEOF(x)#else #define _EDMA_ER_EVT_MASK 0x0000FFFFu #define _EDMA_ER_EVT_SHIFT 0x00000000u #define EDMA_ER_EVT_DEFAULT 0x00000000u #define EDMA_ER_EVT_OF(x) _VALUEOF(x)#endif #define EDMA_ER_OF(x) _VALUEOF(x) #define EDMA_ER_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,ER,EVT)\ ) #define _EDMA_ER_FGET(FIELD)\ _PER_FGET(_EDMA_ER_ADDR,EDMA,ER,##FIELD)/******************************************************************************\* _____________________* | |* | E R L |* |___________________|** ERL - event register, low half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (r) EVT*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_ERL_ADDR 0x01A0FFF0u #define EDMA_ERL EDMA_REG(ERL) #define _EDMA_ERL_EVT_MASK 0xFFFFFFFFu #define _EDMA_ERL_EVT_SHIFT 0x00000000u #define EDMA_ERL_EVT_DEFAULT 0x00000000u #define EDMA_ERL_EVT_OF(x) _VALUEOF(x) #define EDMA_ERL_OF(x) _VALUEOF(x) #define EDMA_ERL_DEFAULT (Uint32)(\ _PERL_FDEFAULT(EDMA,ERL,EVT)\ ) #define _EDMA_ERL_FGET(FIELD)\ _PERL_FGET(_EDMA_ERL_ADDR,EDMA,ERL,FIELD)#endif/******************************************************************************\* _____________________* | |* | E R H |* |___________________|** ERH - event register, high half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (r) EVT*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_ERH_ADDR 0x01A0FFB0u #define EDMA_ERH EDMA_REG(ERH) #define _EDMA_ERH_EVT_MASK 0xFFFFFFFFu #define _EDMA_ERH_EVT_SHIFT 0x00000000u #define EDMA_ERH_EVT_DEFAULT 0x00000000u #define EDMA_ERH_EVT_OF(x) _VALUEOF(x) #define EDMA_ERH_OF(x) _VALUEOF(x) #define EDMA_ERH_DEFAULT (Uint32)(\ _PERH_FDEFAULT(EDMA,ERH,EVT)\ ) #define _EDMA_ERH_FGET(FIELD)\ _PERH_FGET(_EDMA_ERH_ADDR,EDMA,ERH,FIELD)#endif/******************************************************************************\* _____________________* | |* | E E R |* |___________________|** EER - event enable register** FIELDS (msb -> lsb)* (rw) EE*\******************************************************************************/ #define _EDMA_EER_ADDR 0x01A0FFF4u #define EDMA_EER EDMA_REG(EER)#if (C64_SUPPORT) #define _EDMA_EER_EE_MASK 0xFFFFFFFFu #define _EDMA_EER_EE_SHIFT 0x00000000u #define EDMA_EER_EE_DEFAULT 0x00000000u #define EDMA_EER_EE_OF(x) _VALUEOF(x)#else #define _EDMA_EER_EE_MASK 0x0000FFFFu #define _EDMA_EER_EE_SHIFT 0x00000000u #define EDMA_EER_EE_DEFAULT 0x00000000u #define EDMA_EER_EE_OF(x) _VALUEOF(x)#endif #define EDMA_EER_OF(x) _VALUEOF(x) #define EDMA_EER_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,EER,EE)\ ) #define EDMA_EER_RMK(ee) (Uint32)(\ _PER_FMK(EDMA,EER,EE,ee)\ ) #define _EDMA_EER_FGET(FIELD)\ _PER_FGET(_EDMA_EER_ADDR,EDMA,EER,##FIELD) #define _EDMA_EER_FSET(FIELD,field)\ _PER_FSET(_EDMA_EER_ADDR,EDMA,EER,##FIELD,field) #define _EDMA_EER_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_EER_ADDR,EDMA,EER,##FIELD,##SYM)/******************************************************************************\* _____________________* | |* | E E R L |* |___________________|** EERL - event enable register, low half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) EE*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_EERL_ADDR 0x01A0FFF4u #define EDMA_EERL EDMA_REG(EERL) #define _EDMA_EERL_EE_MASK 0xFFFFFFFFu #define _EDMA_EERL_EE_SHIFT 0x00000000u #define EDMA_EERL_EE_DEFAULT 0x00000000u #define EDMA_EERL_EE_OF(x) _VALUEOF(x) #define EDMA_EERL_OF(x) _VALUEOF(x) #define EDMA_EERL_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,EERL,EE)\ ) #define EDMA_EERL_RMK(ee) (Uint32)(\ _PER_FMK(EDMA,EERL,EE,ee)\ ) #define _EDMA_EERL_FGET(FIELD)\ _PER_FGET(_EDMA_EERL_ADDR,EDMA,EERL,##FIELD) #define _EDMA_EERL_FSET(FIELD,field)\ _PER_FSET(_EDMA_EERL_ADDR,EDMA,EERL,##FIELD,field) #define _EDMA_EERL_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_EERL_ADDR,EDMA,EERL,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | E E R H |* |___________________|** EERH - event enable register, high half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) EE*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_EERH_ADDR 0x01A0FFB4u #define EDMA_EERH EDMA_REG(EERH) #define _EDMA_EERH_EE_MASK 0xFFFFFFFFu #define _EDMA_EERH_EE_SHIFT 0x00000000u #define EDMA_EERH_EE_DEFAULT 0x00000000u #define EDMA_EERH_EE_OF(x) _VALUEOF(x) #define EDMA_EERH_OF(x) _VALUEOF(x) #define EDMA_EERH_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,EERH,EE)\ ) #define EDMA_EERH_RMK(ee) (Uint32)(\ _PER_FMK(EDMA,EERH,EE,ee)\ ) #define _EDMA_EERH_FGET(FIELD)\ _PER_FGET(_EDMA_EERH_ADDR,EDMA,EERH,##FIELD) #define _EDMA_EERH_FSET(FIELD,field)\ _PER_FSET(_EDMA_EERH_ADDR,EDMA,EERH,##FIELD,field) #define _EDMA_EERH_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_EERH_ADDR,EDMA,EERH,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | E P R L |* |___________________|** EPRL - event polarity register, low half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) EP*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_EPRL_ADDR 0x01A0FFDCu #define EDMA_EPRL EDMA_REG(EPRL) #define _EDMA_EPRL_EP_MASK 0xFFFFFFFFu #define _EDMA_EPRL_EP_SHIFT 0x00000000u #define EDMA_EPRL_EP_DEFAULT 0x00000000u #define EDMA_EPRL_EP_OF(x) _VALUEOF(x) #define EDMA_EPRL_OF(x) _VALUEOF(x) #define EDMA_EPRL_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,EPRL,EP)\ ) #define EDMA_EPRL_RMK(ep) (Uint32)(\ _PER_FMK(EDMA,EPRL,EP,ep)\ ) #define _EDMA_EPRL_FGET(FIELD)\ _PER_FGET(_EDMA_EPRL_ADDR,EDMA,EPRL,##FIELD) #define _EDMA_EPRL_FSET(FIELD,field)\ _PER_FSET(_EDMA_EPRL_ADDR,EDMA,EPRL,##FIELD,field) #define _EDMA_EPRL_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_EPRL_ADDR,EDMA,EPRL,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | E E R H |* |___________________|** EPRH - event enable register, high half (1)** (1) - C64x devices only** FIELDS (msb -> lsb)* (rw) EP*\******************************************************************************/#if (C64_SUPPORT) #define _EDMA_EPRH_ADDR 0x01A0FF9Cu #define EDMA_EPRH EDMA_REG(EPRH) #define _EDMA_EPRH_EP_MASK 0xFFFFFFFFu #define _EDMA_EPRH_EP_SHIFT 0x00000000u #define EDMA_EPRH_EP_DEFAULT 0x00000000u #define EDMA_EPRH_EP_OF(x) _VALUEOF(x) #define EDMA_EPRH_OF(x) _VALUEOF(x) #define EDMA_EPRH_DEFAULT (Uint32)(\ _PER_FDEFAULT(EDMA,EPRH,EP)\ ) #define EDMA_EPRH_RMK(ep) (Uint32)(\ _PER_FMK(EDMA,EPRH,EP,ep)\ ) #define _EDMA_EPRH_FGET(FIELD)\ _PER_FGET(_EDMA_EPRH_ADDR,EDMA,EPRH,##FIELD) #define _EDMA_EPRH_FSET(FIELD,field)\ _PER_FSET(_EDMA_EPRH_ADDR,EDMA,EPRH,##FIELD,field) #define _EDMA_EPRH_FSETS(FIELD,SYM)\ _PER_FSETS(_EDMA_EPRH_ADDR,EDMA,EPRH,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* | |* | E C R |* |___________________|** ECR - event clear register** FIELDS (msb -> lsb)* (rw) EC*\******************************************************************************/ #define _EDMA_ECR_ADDR 0x01A0FFF8u #define EDMA_ECR EDMA_REG(ECR)#if (C64_SUPPORT) #define _EDMA_ECR_EC_MASK 0xFFFFFFFFu #define _EDMA_ECR_EC_SHIFT 0x00000000u #define EDMA_ECR_EC_DEFAULT 0x00000000u #define EDMA_ECR_EC_OF(x) _VALUEOF(x)#else?? 快捷鍵說明
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