?? bsl_flash.asm
字號(hào):
[!A2] CMPLTU .L1X B4,A0,A1
|| MVKL .S2 _page_buffer,B7 ; |101|
[!A1] B .S1 L18 ; |66|
|| STW .D2T2 B10,*+SP(24) ; |157|
|| MVKL .S2 0x1800004,B5 ; |173|
|| ZERO .L2 B6 ; |100|
STW .D2T2 B3,*+SP(20) ; |157|
|| MVKH .S2 0x70000000,B6 ; |100|
STW .D2T1 A12,*+SP(16) ; |157|
|| MVKH .S2 _page_buffer,B7 ; |101|
|| ZERO .D1 A4 ; |100|
|| MVKL .S1 0x9001ffff,A5 ; |165|
STW .D2T1 A11,*+SP(12) ; |157|
|| ADD .L2X B6,A6,B6 ; |100|
|| MVKH .S1 0x70000000,A4 ; |100|
|| MVKH .S2 0x1800004,B5 ; |173|
MV .L1X B7,A0 ; |101|
|| CLR .S2 B6,0,6,B4 ; |100|
|| CLR .S1 A10,4,7,A3 ; |173|
|| STW .D2T2 B11,*+SP(28) ; |157|
|| MV .L2 B4,B8
SUB .L1X B4,A4,A3 ; |100|
|| STW .D2T1 A3,*B5 ; |173|
|| MVKH .S1 0x9001ffff,A5 ; |165|
|| MVK .S2 0x80,B0 ; |103|
; BRANCH OCCURS ; |66|
;** --------------------------------------------------------------------------*
SUB .D2 B0,1,B0 ; |105|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 103
;* Loop opening brace source line : 103
;* Loop closing brace source line : 105
;* Known Minimum Trip Count : 128
;* Known Maximum Trip Count : 128
;* Known Max Trip Count Factor : 128
;* Loop Carried Dependency Bound(^) : 7
;* Unpartitioned Resource Bound : 1
;* Partitioned Resource Bound(*) : 1
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 1* 0
;* .D units 1* 1*
;* .M units 0 0
;* .X cross paths 0 1*
;* .T address paths 1* 1*
;* Long read paths 0 1*
;* Long write paths 0 0
;* Logical ops (.LS) 0 1 (.L or .S unit)
;* Addition ops (.LSD) 0 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 1* 1*
;* Bound(.L .S .D .LS .LSD) 1* 1*
;*
;* Disqualified loop: Loop carried dependency bound too large
;*----------------------------------------------------------------------------*
L17:
[ B0] B .S1 L17 ; |105|
|| LDB .D1T1 *A3++,A4 ; |104|
[ B0] SUB .D2 B0,1,B0 ; |105|
NOP 3
STB .D1T1 A4,*A0++ ; |104|
; BRANCH OCCURS ; |105|
;** --------------------------------------------------------------------------*
L18:
ADD .S1X A2,B8,A3
CMPLTU .L1 A2,A3,A1
[!A1] B .S1 L20 ; |186|
MVKL .S1 _page_buffer-1,A0
MV .S2X A2,B10
|| MVKH .S1 _page_buffer-1,A0
MVK .S1 0xffffffff,A3
|| ADD .D1 A0,A2,A0
|| MV .L2X A2,B7
|| MV .D2 B8,B0 ; |187|
|| [!A1] MVKL .S2 _validate_FLASH,B6 ; |207|
[!A1] MVKL .S2 0x90002aaa,B9 ; |95|
|| [!A1] MVK .S1 -1,A3 ; |194|
[!A1] MVKL .S2 0x90005555,B2 ; |93|
|| [!A1] MVKL .S1 0x90005555,A11 ; |94|
|| [ A1] ADD .D2 1,B7,B4 ; |65|
; BRANCH OCCURS ; |186|
;** --------------------------------------------------------------------------*
EXTU .S2 B4,25,25,B1 ; |65|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;* Disqualified loop: bad loop structure
;*----------------------------------------------------------------------------*
L19:
[!B1] B .S1 L21 ; |66|
ADD .D2 1,B7,B7 ; |189|
|| STB .D1T1 A3,*++A0 ; |187|
|| [ B1] SUB .L2 B0,1,B0 ; |191|
|| [!B1] MVKL .S2 _validate_FLASH,B6 ; |207|
[!B1] MVKL .S2 0x90002aaa,B9 ; |95|
|| [!B1] MVK .S1 -1,A3 ; |194|
[!B1] MVKL .S2 0x90005555,B2 ; |93|
|| [!B1] MVKL .S1 0x90005555,A11 ; |94|
[!B1] MVKL .S2 0x90002aaa,B0 ; |92|
|| [!B1] MVKL .S1 0x90005555,A8 ; |85|
[!B1] MVKL .S2 RL8,B3 ; |207|
|| [!B1] MVKL .S1 0x90005555,A2 ; |96|
; BRANCH OCCURS ; |66|
;** --------------------------------------------------------------------------*
[ B0] B .S1 L19 ; |191|
[ B0] ADD .D2 1,B7,B4 ; |65|
[!B0] MVKL .S2 _validate_FLASH,B6 ; |207|
[ B0] EXTU .S2 B4,25,25,B1 ; |65|
[!B0] MVKL .S2 0x90002aaa,B9 ; |95|
|| [!B0] MVK .S1 -1,A3 ; |194|
[!B0] MVKL .S2 0x90005555,B2 ; |93|
|| [!B0] MVKL .S1 0x90005555,A11 ; |94|
; BRANCH OCCURS ; |191|
;** --------------------------------------------------------------------------*
L20:
MVKL .S2 0x90002aaa,B0 ; |92|
|| MVKL .S1 0x90005555,A8 ; |85|
MVKL .S2 RL8,B3 ; |207|
|| MVKL .S1 0x90005555,A2 ; |96|
;** --------------------------------------------------------------------------*
L21:
MVKL .S2 0x90005555,B1 ; |87|
|| MVKL .S1 0x90002aaa,A7 ; |86|
MVK .S2 -96,B11 ; |87|
|| MVKL .S1 0x90005555,A9 ; |91|
MVK .S2 0x55,B5 ; |86|
|| MVK .S1 16,A12 ; |96|
MVK .S1 0xffffffaa,A0 ; |85|
|| CMPEQ .L1X B8,A3,A1 ; |194|
|| MVK .S2 -128,B12 ; |93|
[ A1] B .S1 L28 ; |194|
|| MVKH .S2 _validate_FLASH,B6 ; |207|
MVKH .S2 0x90002aaa,B9 ; |95|
|| MVKH .S1 0x90005555,A11 ; |94|
MVKH .S1 0x90005555,A8 ; |85|
|| MVKH .S2 0x90005555,B2 ; |93|
MVKH .S1 0x90005555,A2 ; |96|
|| MVKH .S2 0x90002aaa,B0 ; |92|
MVKH .S2 RL8,B3 ; |207|
|| MVKH .S1 0x90002aaa,A7 ; |86|
ZERO .D1 A3 ; |196|
|| MVKH .S2 0x90005555,B1 ; |87|
|| MVKH .S1 0x90005555,A9 ; |91|
|| MV .L1 A6,A4 ; |207|
|| MV .D2 B8,B4 ; |207|
|| SUB .L2 B7,B10,B7 ; |192|
; BRANCH OCCURS ; |194|
;** --------------------------------------------------------------------------*
B .S2 B6 ; |207|
NOP 5
RL8: ; CALL OCCURS ; |207|
ZERO .D1 A8 ; |211|
MVKH .S1 0x70000000,A8 ; |211|
MVK .S1 -86,A7 ; |85|
ADD .D1 A8,A6,A6 ; |211|
|| MVK .S1 -96,A9 ; |87|
MVK .S2 0x20,B0 ; |213|
|| MV .D1 A4,A1 ; |207|
|| CLR .S1 A6,0,6,A6 ; |211|
MVKL .S1 _page_buffer-4,A3
|| [!A1] B .S2 L31 ; |207|
MVK .S2 85,B6 ; |86|
|| MVKL .S1 0x90005555,A0 ; |85|
MVKL .S2 0x8ffffffc,B5 ; |211|
|| MVKL .S1 0x90005555,A5 ; |87|
MVKH .S1 _page_buffer-4,A3
|| MVKH .S2 0x8ffffffc,B5 ; |211|
MVKL .S2 0x90002aaa,B4 ; |86|
|| MVKH .S1 0x90005555,A0 ; |85|
ADD .L1X B5,A6,A3 ; |211|
|| [!A1] LDW .D2T2 *+SP(20),B3 ; |229|
|| MVKH .S1 0x90005555,A5 ; |87|
|| MVKH .S2 0x90002aaa,B4 ; |86|
|| MV .D1 A3,A4
; BRANCH OCCURS ; |207|
;** --------------------------------------------------------------------------*
STB .D1T1 A7,*A0 ; |85|
STB .D2T2 B6,*B4 ; |86|
|| ADD .S2X 1,A4,B6
ADD .S2X 1,A3,B4
|| STB .D1T1 A9,*A5 ; |87|
;*----------------------------------------------------------------------------*
;* SOFTWARE PIPELINE INFORMATION
;*
;* Loop source line : 213
;* Loop opening brace source line : 213
;* Loop closing brace source line : 216
;* Loop Unroll Multiple : 4x
;* Known Minimum Trip Count : 32
;* Known Maximum Trip Count : 32
;* Known Max Trip Count Factor : 32
;* Loop Carried Dependency Bound(^) : 24
;* Unpartitioned Resource Bound : 4
;* Partitioned Resource Bound(*) : 6
;* Resource Partition:
;* A-side B-side
;* .L units 0 0
;* .S units 0 1
;* .D units 6* 2
;* .M units 0 0
;* .X cross paths 0 0
;* .T address paths 6* 2
;* Long read paths 3 1
;* Long write paths 0 0
;* Logical ops (.LS) 0 0 (.L or .S unit)
;* Addition ops (.LSD) 1 1 (.L or .S or .D unit)
;* Bound(.L .S .LS) 0 1
;* Bound(.L .S .D .LS .LSD) 3 2
;*
;* Searching for software pipeline schedule at ...
;* ii = 24 Schedule found with 1 iterations in parallel
;* done
;*
;* Loop is interruptible
;* Collapsed epilog stages : 0
;* Collapsed prolog stages : 0
;*
;* Minimum safe trip count : 1 (after unrolling)
;*----------------------------------------------------------------------------*
L22: ; PIPED LOOP PROLOG
;** --------------------------------------------------------------------------*
L23: ; PIPED LOOP KERNEL
LDB .D1T1 *++A4(4),A0 ; ^ |214|
NOP 4
STB .D1T1 A0,*++A3(4) ; ^ |214|
ADD .D1 1,A3,A5 ; |214|
|| LDB .D2T2 *++B6(4),B5 ; ^ |214|
NOP 4
STB .D2T2 B5,*++B4(4) ; ^ |214|
LDB .D1T1 *+A4(2),A0 ; ^ |214|
NOP 4
[ B0] SUB .D2 B0,1,B0 ; |216|
|| STB .D1T1 A0,*+A3(2) ; ^ |214|
[ B0] B .S2 L23 ; |216|
|| LDB .D1T1 *+A4(3),A0 ; ^ |214|
NOP 4
STB .D1T1 A0,*+A3(3) ; ^ |214|
;** --------------------------------------------------------------------------*
L24: ; PIPED LOOP EPILOG
;** --------------------------------------------------------------------------*
MVKL .S1 _page_buffer+127,A0 ; |220|
|| ADD .D1 4,A3,A3
MVKH .S1 _page_buffer+127,A0 ; |220|
|| LDB .D1T1 *--A3,A4 ; |218|
LDB .D1T1 *A0,A0 ; |220|
NOP 3
STB .D2T1 A4,*+SP(4) ; |218|
LDB .D2T2 *+SP(4),B5 ; |220|
|| MV .S2X A0,B4
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