?? evmdm642_disparamshdtvdefault.h
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/*
* Copyright 2003 by Texas Instruments Incorporated.
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* "@(#) DDK 1.10.00.21 06-26-03 (ddk-b10)" */
#include <vport.h>
#include <vportdis.h>
#include <saa7105.h>
#include <csl_edma.h>
#define EVMDM642_DIS_PARAMS_PORT_DEFAULT { \
FALSE, /* enableDualChan; */ \
VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 1 polarity */ \
VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity */ \
VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity */ \
&SAA7105_Fxns, \
INV, \
}
#define EVMDM642_DIS_PARAMS_SAA7105_HDTV_DEFAULT(Mode) { \
SAA7105_AFMT_YPBPR, \
SAA7105_MODE_##Mode##, \
SAA7105_IFMT_YCBCR422_NONEINTERLACED, \
TRUE, \
FALSE, \
INV \
}
#define _EVMDM642_DIS_PARAMS_CHAN_HD480P60F_DEFAULT { \
VPORT_MODE_YCBCR_8BIT, /* dmode:3 */ \
VPORT_FLDOP_PROGRESSIVE,/* fldOp:3 */ \
VPORT_SCALING_DISABLE, /* scale:1 */ \
VPORT_RESMPL_DISABLE, /* resmpl:1 */ \
VPORTDIS_DEFVAL_ENABLE,/* defValEn:1 */ \
VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */ \
VPORTDIS_VCTL1_HSYNC, /* vctl1Config:2 */ \
VPORTDIS_VCTL2_VSYNC, /* vctl2Config:2 */ \
VPORTDIS_VCTL3_CBLNK, /* vctl3Config:1 */ \
VPORTDIS_EXC_DISABLE, /* extCtl:3 */ \
858, /* frmHSize */ \
525, /* frmVSize */ \
0, /* imgHOffsetFld1 */ \
0, /* imgVOffsetFld1 */ \
720, /* imgHSizeFld1 */ \
480, /* imgVSizeFld1 */ \
0, /* imgHOffsetFld2 */ \
0, /* imgVOffsetFld2 */ \
0, /* imgHSizeFld2 */ \
0, /* imgVSizeFld2 */ \
720, /* hBlnkStart */ \
854, /* hBlnkStop */ \
0, /* vBlnkXStartFld1 */ \
1, /* vBlnkYStartFld1 */ \
0, /* vBlnkXStopFld1 */ \
46, /* vBlnkYStopFld1 */ \
0, /* vBlnkXStartFld2 */ \
0, /* vBlnkYStartFld2 */ \
0, /* vBlnkXStopFld2 */ \
0, /* vBlnkYStopFld2 */ \
0, /* xStartFld1 */ \
1, /* yStartFld1 */ \
0, /* xStartFld2 */ \
0, /* yStartFld2 */ \
736, /* hSyncStart */ \
799, /* hSyncStop */ \
736, /* vSyncXStartFld1 */ \
9, /* vSyncYStartFld1 */ \
736, /* vSyncXStopFld1 */ \
15, /* vSyncYStopFld1 */ \
0, /* vSyncXStartFld2 */ \
0, /* vSyncYStartFld2 */ \
0, /* vSyncXStopFld2 */ \
0, /* vSyncYStopFld2 */ \
16, /* yClipLow */ \
235, /* yClipHigh */ \
16, /* cClipLow */ \
240, /* cClipHigh */ \
0x10, \
0x80, \
0x80, \
\
\
VPORTDIS_RGBX_DISABLE, /* RGB extract disable */ \
0, /* incPix, for raw mode only */ \
(720>>3), /*thrld */ \
3, /*numFrmBufs*/ \
128, /*alignment */ \
VPORT_FLDS_MERGED, /*mergeFlds */ \
NULL, /*segId */ \
EDMA_OPT_PRI_HIGH, /*edmaPri */ \
8 /* irqId */ \
}
#define _EVMDM642_DIS_PARAMS_CHAN_HD720P60F_DEFAULT { \
VPORT_MODE_YCBCR_8BIT, /* dmode:3 */ \
VPORT_FLDOP_PROGRESSIVE,/* fldOp:3 */ \
VPORT_SCALING_DISABLE, /* scale:1 */ \
VPORT_RESMPL_DISABLE, /* resmpl:1 */ \
VPORTDIS_DEFVAL_ENABLE,/* defValEn:1 */ \
VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */ \
VPORTDIS_VCTL1_HSYNC, /* vctl1Config:2 */ \
VPORTDIS_VCTL2_VSYNC, /* vctl2Config:2 */ \
VPORTDIS_VCTL3_CBLNK, /* vctl3Config:1 */ \
VPORTDIS_EXC_DISABLE, /* extCtl:3 */ \
1650, /* frmHSize */ \
750, /* frmVSize */ \
0, /* imgHOffsetFld1 */ \
0, /* imgVOffsetFld1 */ \
1280, /* imgHSizeFld1 */ \
720, /* imgVSizeFld1 */ \
0, /* imgHOffsetFld2 */ \
0, /* imgVOffsetFld2 */ \
0, /* imgHSizeFld2 */ \
0, /* imgVSizeFld2 */ \
1280, /* hBlnkStart */ \
1646, /* hBlnkStop */ \
0, /* vBlnkXStartFld1 */ \
1, /* vBlnkYStartFld1 */ \
0, /* vBlnkXStopFld1 */ \
31, /* vBlnkYStopFld1 */ \
0, /* vBlnkXStartFld2 */ \
0, /* vBlnkYStartFld2 */ \
0, /* vBlnkXStopFld2 */ \
0, /* vBlnkYStopFld2 */ \
0, /* xStartFld1 */ \
1, /* yStartFld1 */ \
0, /* xStartFld2 */ \
0, /* yStartFld2 */ \
1390, /* hSyncStart */ \
1430, /* hSyncStop */ \
1390, /* vSyncXStartFld1 */ \
5, /* vSyncYStartFld1 */ \
1390, /* vSyncXStopFld1 */ \
10, /* vSyncYStopFld1 */ \
0, /* vSyncXStartFld2 */ \
0, /* vSyncYStartFld2 */ \
0, /* vSyncXStopFld2 */ \
0, /* vSyncYStopFld2 */ \
16, /* yClipLow */ \
235, /* yClipHigh */ \
16, /* cClipLow */ \
240, /* cClipHigh */ \
0x10, \
0x80, \
0x80, \
\
\
VPORTDIS_RGBX_DISABLE, /* RGB extract disable */ \
0, /* incPix, for raw mode only */ \
(1280>>3), /*thrld */ \
3, /*numFrmBufs*/ \
128, /*alignment */ \
VPORT_FLDS_MERGED, /*mergeFlds */ \
NULL, /*segId */ \
EDMA_OPT_PRI_HIGH, /*edmaPri */ \
8 /* irqId */ \
}
#define _EVMDM642_DIS_PARAMS_CHAN_HD1080I30F_DEFAULT { \
VPORT_MODE_YCBCR_8BIT, /* dmode:3 */ \
VPORT_FLDOP_FRAME,/* fldOp:3 */ \
VPORT_SCALING_DISABLE, /* scale:1 */ \
VPORT_RESMPL_DISABLE, /* resmpl:1 */ \
VPORTDIS_DEFVAL_ENABLE,/* defValEn:1 */ \
VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */ \
VPORTDIS_VCTL1_HSYNC, /* vctl1Config:2 */ \
VPORTDIS_VCTL2_VSYNC, /* vctl2Config:2 */ \
VPORTDIS_VCTL3_CBLNK, /* vctl3Config:1 */ \
VPORTDIS_EXC_DISABLE, /* extCtl:3 */ \
2200, /* frmHSize */ \
1125, /* frmVSize */ \
0, /* imgHOffsetFld1 */ \
0, /* imgVOffsetFld1 */ \
1920, /* imgHSizeFld1 */ \
540, /* imgVSizeFld1 */ \
0, /* imgHOffsetFld2 */ \
0, /* imgVOffsetFld2 */ \
1920, /* imgHSizeFld2 */ \
540, /* imgVSizeFld2 */ \
1920, /* hBlnkStart */ \
2196, /* hBlnkStop */ \
0, /* vBlnkXStartFld1 */ \
1, /* vBlnkYStartFld1 */ \
0, /* vBlnkXStopFld1 */ \
23, /* vBlnkYStopFld1 */ \
0, /* vBlnkXStartFld2 */ \
563, /* vBlnkYStartFld2 */ \
0, /* vBlnkXStopFld2 */ \
586, /* vBlnkYStopFld2 */ \
0, /* xStartFld1 */ \
1, /* yStartFld1 */ \
0, /* xStartFld2 */ \
563, /* yStartFld2 */ \
2008, /* hSyncStart */ \
2052, /* hSyncStop */ \
2008, /* vSyncXStartFld1 */ \
2, /* vSyncYStartFld1 */ \
2008, /* vSyncXStopFld1 */ \
7, /* vSyncYStopFld1 */ \
908, /* vSyncXStartFld2 */ \
505, /* vSyncYStartFld2 */ \
908, /* vSyncXStopFld2 */ \
505, /* vSyncYStopFld2 */ \
16, /* yClipLow */ \
235, /* yClipHigh */ \
16, /* cClipLow */ \
240, /* cClipHigh */ \
0x10, \
0x80, \
0x80, \
\
\
VPORTDIS_RGBX_DISABLE, /* RGB extract disable */ \
0, /* incPix, for raw mode only */ \
(1920>>3), /*thrld */ \
3, /*numFrmBufs*/ \
128, /*alignment */ \
VPORT_FLDS_MERGED, /*mergeFlds */ \
NULL, /*segId */ \
EDMA_OPT_PRI_HIGH, /*edmaPri */ \
8 /* irqId */ \
}
#define EVMDM642_DIS_PARAMS_CHAN_YCBCR_DEFAULT(Mode) \
_EVMDM642_DIS_PARAMS_CHAN_##Mode##_DEFAULT
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