?? aic23.c
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/*
* Copyright 2003 by Texas Instruments Incorporated.
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* "@(#) DDK 1.10.00.23 07-02-03 (ddk-b12)" */
/*
* ======== aic23.c ========
*
* AIC23 codec driver implementation specific to the
* Spectrum Digital DM642 EVM board.
*/
#include <std.h>
#include <csl.h>
#include <csl_i2c.h>
#include <iom.h>
#include <aic23.h>
#include <evmdm642_edma_aic23.h>
#include <evmdm642.h>
#include <evmdm642_apll.h>
extern I2C_Handle EVMDM642_I2C_hI2C;
static void aic23Rset(Uint16 regnum, Uint16 regval);
static AIC23_Params codecstate = AIC23_DEFAULTPARAMS_EVMDM642;
static I2C_Config aic23XmtCfg = {
0x0000007f, /* I2COAR - Not used if master */
0x00000000, /* I2CIER - Disable interrupts, use polling */
0x0000001b, /* I2CCLKL - Low period for 100KHz operation */
0x0000001b, /* I2CCLKH - High period for 100KHz operation */
0x00000002, /* I2CCNT - Data words per transmission */
0x0000001a, /* I2CSAR - Slave address */
0x00004ea0, /* I2CMDR - Mode */
0x00000019 /* I2CPSC - Prescale 300MHz to 12MHz */
};
/*
* ======== AIC23_setParams ========
*
* This function takes a pointer to the object of type AIC23_Params,
* and writes all 11 control words found in it to the codec. Prior
* to that it initializes the codec if this is the first time the
* function is ever called. Return TRUE for successful completion,
* FALSE if errors.
*/
Int AIC23_setParams(AIC23_Params *paramsp)
{
Int i;
AIC23_Params *params = paramsp;
/* set to AIC23_DEFAULTPARAMS_EVMDM642 if NULL */
if (params == NULL) {
params = &codecstate;
}
/* Reset the AIC23 */
aic23Rset(AIC23_RESET, 0);
/* Assign each register */
for (i = 0; i < AIC23_NUMREGS; i++) {
aic23Rset(i, params->regs[i]);
}
return TRUE;
}
/*
* ======== aic23Rset ========
* Set codec register regnum to value regval. The 16-bit word is composed
* of register address in the upper 7 bits and the 9-bit register value
* stored in the parameters structure.
*/
static Void aic23Rset(Uint16 regnum, Uint16 regval)
{
Uint16 data;
I2C_Config prevI2CCfg;
/* Mask off lower 9 bits */
regval &= 0x1ff;
/* Set transmit data */
data = (regnum << 9) | regval;
/* Wait until bus is free */
while (I2C_bb(EVMDM642_I2C_hI2C));
/* Save old settings */
I2C_getConfig(EVMDM642_I2C_hI2C, &prevI2CCfg);
/* Restore settings for AIC23 */
I2C_config(EVMDM642_I2C_hI2C, &aic23XmtCfg);
/* Submit the MSB for transmit */
I2C_writeByte(EVMDM642_I2C_hI2C, (data >> 8) & 0xff);
/* Generate start condition, starts transmission */
I2C_start(EVMDM642_I2C_hI2C);
/* Wait until MSB transmit is done */
while(!I2C_xrdy(EVMDM642_I2C_hI2C));
/* Submit the LSB for transmit */
I2C_writeByte(EVMDM642_I2C_hI2C, data & 0xff);
/* Generate stop condition */
I2C_sendStop(EVMDM642_I2C_hI2C);
/* Wait until bus is free */
while (I2C_bb(EVMDM642_I2C_hI2C));
/* Save register value if regnum is in range */
if (regnum < AIC23_NUMREGS)
codecstate.regs[regnum] = regval;
/* Short delay for AIC23 to accept command */
EVMDM642_waitusec(20);
/* Reconfigure I2C with old settings */
I2C_config(EVMDM642_I2C_hI2C, &prevI2CCfg);
}
#define AIC23_REG8_18432_96000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
0,1,1,1,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_18432_48000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
0,0,0,0,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_18432_32000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
0,1,1,0,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_18432_16000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
1, /* clock input divider: 1 (MCLK) */ \
0,1,1,0,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_18432_8000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
0,0,1,1,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_18432_4000 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
1, /* clock input divider: 1 (MCLK) */ \
0,0,1,1,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_16934_88200 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
1,1,1,1,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_16934_44100 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
1,0,0,0,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_16934_22050 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
1, /* clock input divider: 1 (MCLK) */ \
1,0,0,0,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
#define AIC23_REG8_16934_8021 \
AIC23_9BITWORD( /* REG 8: sample rate control */ \
0, /* reserved */ \
0, /* clock output divider: 1 (MCLK) */ \
0, /* clock input divider: 1 (MCLK) */ \
1,0,1,1,1, /* sampling rate: ADC 48kHz DAC 48kHz */ \
0 /* clock mode select (USB/normal): normal */ \
)
/*
* ======== AIC23_setSampleRate ========
*
*/
Void AIC23_setSampleRate(Uint32 sampleRate)
{
Uint16 reg8Val;
switch(sampleRate) {
case 96000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_96000;
break;
case 88200:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG1);
reg8Val = AIC23_REG8_16934_88200;
break;
case 48000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_48000;
break;
case 44100:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG1);
reg8Val = AIC23_REG8_16934_44100;
break;
case 32000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_32000;
break;
case 22050:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG1);
reg8Val = AIC23_REG8_16934_22050;
break;
case 16000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_16000;
break;
case 8021:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG1);
reg8Val = AIC23_REG8_16934_8021;
break;
case 8000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_8000;
break;
case 4000:
EVMDM642_APLL_rset(EVMDM642_APLL_FSG0);
reg8Val = AIC23_REG8_18432_4000;
break;
default:
reg8Val = AIC23_REG8_18432_48000;
break;
}
aic23Rset(8, reg8Val);
}
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