library ieee;
use ieee.std_logic_1164.all;

entity E_mux2 is
port (x : in std_logic ;
      y : in std_logic ;
      s : in std_logic ;
      m : buffer std_logic 
      );
end E_mux2;

ARCHITECTURE Behavior OF E_mux2 IS
BEGIN
m <= (NOT (s) AND x) OR (s AND y);
END Behavior;