{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Full Version " "Info: Version 8.0 Build 215 05/29/2008 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jan 01 09:22:32 2006 " "Info: Processing started: Sun Jan 01 09:22:32 2006" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off E_exam1 -c E_exam1 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off E_exam1 -c E_exam1 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "s\[1\] Displayb\[1\] 16.916 ns Longest " "Info: Longest tpd from source pin \"s\[1\]\" to destination pin \"Displayb\[1\]\" is 16.916 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.852 ns) 0.852 ns s\[1\] 1 PIN PIN_V1 15 " "Info: 1: + IC(0.000 ns) + CELL(0.852 ns) = 0.852 ns; Loc. = PIN_V1; Fanout = 15; PIN Node = 's\[1\]'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { s[1] } "NODE_NAME" } } { "E_exam1.vhd" "" { Text "D:/altera/80/works/E_exam1/E_exam1.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.081 ns) + CELL(0.420 ns) 7.353 ns Mux5~32 2 COMB LCCOMB_X31_Y5_N22 8 " "Info: 2: + IC(6.081 ns) + CELL(0.420 ns) = 7.353 ns; Loc. = LCCOMB_X31_Y5_N22; Fanout = 8; COMB Node = 'Mux5~32'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "6.501 ns" { s[1] Mux5~32 } "NODE_NAME" } } { "E_exam1.vhd" "" { Text "D:/altera/80/works/E_exam1/E_exam1.vhd" 42 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.795 ns) + CELL(0.437 ns) 8.585 ns E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~71 3 COMB LCCOMB_X32_Y4_N0 1 " "Info: 3: + IC(0.795 ns) + CELL(0.437 ns) = 8.585 ns; Loc. = LCCOMB_X32_Y4_N0; Fanout = 1; COMB Node = 'E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~71'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.232 ns" { Mux5~32 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~71 } "NODE_NAME" } } { "E_mux2.vhd" "" { Text "D:/altera/80/works/E_exam1/E_mux2.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.747 ns) + CELL(0.150 ns) 9.482 ns E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~72 4 COMB LCCOMB_X31_Y6_N12 2 " "Info: 4: + IC(0.747 ns) + CELL(0.150 ns) = 9.482 ns; Loc. = LCCOMB_X31_Y6_N12; Fanout = 2; COMB Node = 'E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~72'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.897 ns" { E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~71 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~72 } "NODE_NAME" } } { "E_mux2.vhd" "" { Text "D:/altera/80/works/E_exam1/E_mux2.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.739 ns) + CELL(0.420 ns) 10.641 ns E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~73 5 COMB LCCOMB_X32_Y5_N26 2 " "Info: 5: + IC(0.739 ns) + CELL(0.420 ns) = 10.641 ns; Loc. = LCCOMB_X32_Y5_N26; Fanout = 2; COMB Node = 'E_example1:u11\|E_multiplexer:u8\|E_mux51:u6\|E_mux2:u4\|m~73'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.159 ns" { E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~72 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~73 } "NODE_NAME" } } { "E_mux2.vhd" "" { Text "D:/altera/80/works/E_exam1/E_mux2.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.259 ns) + CELL(0.420 ns) 11.320 ns E_example1:u11\|E_7_seg:u9\|Mux2~82 6 COMB LCCOMB_X32_Y5_N24 2 " "Info: 6: + IC(0.259 ns) + CELL(0.420 ns) = 11.320 ns; Loc. = LCCOMB_X32_Y5_N24; Fanout = 2; COMB Node = 'E_example1:u11\|E_7_seg:u9\|Mux2~82'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.679 ns" { E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~73 E_example1:u11|E_7_seg:u9|Mux2~82 } "NODE_NAME" } } { "E_7_seg.vhd" "" { Text "D:/altera/80/works/E_exam1/E_7_seg.vhd" 15 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.944 ns) + CELL(2.652 ns) 16.916 ns Displayb\[1\] 7 PIN PIN_AA25 0 " "Info: 7: + IC(2.944 ns) + CELL(2.652 ns) = 16.916 ns; Loc. = PIN_AA25; Fanout = 0; PIN Node = 'Displayb\[1\]'" {  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "5.596 ns" { E_example1:u11|E_7_seg:u9|Mux2~82 Displayb[1] } "NODE_NAME" } } { "E_exam1.vhd" "" { Text "D:/altera/80/works/E_exam1/E_exam1.vhd" 13 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.351 ns ( 31.63 % ) " "Info: Total cell delay = 5.351 ns ( 31.63 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.565 ns ( 68.37 % ) " "Info: Total interconnect delay = 11.565 ns ( 68.37 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "16.916 ns" { s[1] Mux5~32 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~71 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~72 E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~73 E_example1:u11|E_7_seg:u9|Mux2~82 Displayb[1] } "NODE_NAME" } } { "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/80/quartus/bin/Technology_Viewer.qrui" "16.916 ns" { s[1] {} s[1]~combout {} Mux5~32 {} E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~71 {} E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~72 {} E_example1:u11|E_multiplexer:u8|E_mux51:u6|E_mux2:u4|m~73 {} E_example1:u11|E_7_seg:u9|Mux2~82 {} Displayb[1] {} } { 0.000ns 0.000ns 6.081ns 0.795ns 0.747ns 0.739ns 0.259ns 2.944ns } { 0.000ns 0.852ns 0.420ns 0.437ns 0.150ns 0.420ns 0.420ns 2.652ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "126 " "Info: Peak virtual memory: 126 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Jan 01 09:22:34 2006 " "Info: Processing ended: Sun Jan 01 09:22:34 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}