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<P>Once the elements of the computer are integrated into a single chip, it becomes very difficult for an outside observer to intercept signals flowing among the various elements and to subsequently discern the information content of those signals. The connection to the outside world through which information flows is a simple I/O port that can be guarded, to a large extent, by the processor included within the chip. This is done through the use of high-level telecommunications protocols through which the chip’s processor element filters all information that is passed to or from the other components of the chip. Through these protocols, it is possible to require authentication of the identity of the reader-side program that is communicating with the computer on the smart card. In this manner, the smart card can protect itself by communicating only with entities that can prove who they are and that the smart card’s computer trusts. (Chapter 9, “Smart Cards and Security,” includes further discussion on what is meant by <I>trust</I> and <I>security</I>.)</P>
<P>In addition to enhancing the security of the smart card, the integrated circuit chip packaging also provides a small unit that is amenable to being embedded in a credit card-sized card which can be carried by the card bearer. When embedded in the plastic card and carried, for example, in a person’s wallet, the chip is subject to a variety of physical forces. The card is bent and flexed and may be subjected to sudden shocks. In typical electronic equipment, in which components are tied together through macroscopic electrical wiring or even conducting lines on a printed circuit board, this physical environment is an excellent recipe for many failures. When all the elements are packaged in a single chip, however, the stresses tend to be applied equally to all the elements. So, if the chip itself can hold together, then the components will tend to operate successfully. Empirical evidence indicates that when chips are reduced to a size of approximately 25 square millimeters (in roughly a square configuration), they are able to withstand the day-to-day stresses encountered through normal credit card-type uses.</P>
<P>Achieving the small size of the chip is dependent on several criteria:</P>
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<DD><B>•</B> The resolution of the technology used for the chip, which is often characterized by “feature size” (for example, the size of a single transistor element within the chip) in microns
<DD><B>•</B> The width of the internal bus of the processor; that is, is it 8 bits, 16 bits, 32 bits, or 64 bits?
<DD><B>•</B> The type of memory used
<DD><B>•</B> Auxiliary elements (such as power line frequency, voltage filters, and memory-mapping registers) included in the chip for security or functionality reasons
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<P><FONT SIZE="+1"><B>Size</B></FONT></P>
<P>The small size needed for chip features requires leading-edge technology. However, in order for chips to be inexpensive and reliable, we often need to turn to older, more mature technologies.
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<P><FONT SIZE="+1"><B>Width</B></FONT></P>
<P>The width of the internal bus structure indicates the number of memory address lines running between components within a chip; that is, width is generally indicative of the number of bits in individually addressable sections of memory. Minimizing chip size generally tends to call for selection of fewer address lines; therefore, most smart card chips are currently based on 8-bit microprocessors. These microprocessors also tend to be the older and more mature technologies.
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<P><FONT SIZE="+1"><B>Memory</B></FONT></P>
<P>The type of memory used in smart card chips brings a very interesting wrinkle. The implementation technologies used for chip memories vary greatly in the size of individual memory cells. The smallest memory element is read-only memory (ROM). This type of memory, as the name implies, can be read by typical computer elements, but it requires very special equipment in order to write information into the memory. In fact, the writing of ROM can be incorporated very early into the chip fabrication process itself. This technique tends to enhance the security of the chip, since it is difficult to examine the contents of the ROM without destroying the chip—even with very expensive probing equipment. So this type of memory is useful for permanently encoding stored programs for the smart card, but it is useless for storage of dynamic information that needs to be changed during the normal use of the card.
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<P>Significantly larger is the electrically erasable and programmable read-only memory (EEPROM). The contents of this type of memory in a smart card chip can actually be modified during normal use of the card. Hence, programs or data can be stored in EEPROM during normal operation of the card and then read back by applications that are using the card. The electrical characteristics of EEPROM memory are such that it can only be erased and then reprogrammed a finite (but reasonably large) number of times, generally around 100,000 times. While somewhat limited, techniques have evolved which make this type of memory quite useful for typical smart card uses. EEPROM memory cells tend to be close to a factor of four larger than ROM memory cells. EEPROM, like ROM, does have the nice characteristic of being nonvolatile memory; that is, the information content of the memory is unchanged when the power to the memory is turned off. Information content is preserved across power-up and power-down cycles on the smart card chip.</P>
<P>Larger still is a memory type known as random access memory (RAM). This is the type of memory used in typical computer systems, such as a desktop PC. Information can be written and erased many times in this type of memory. In the smart card chip, however, a RAM memory cell is approximately four times larger than an EEPROM memory cell. RAM is also volatile memory; that is, the contents of the memory are lost when power is removed from the memory cell. So information in RAM is not preserved across a power-down and power-up cycle on a smart card. RAM is, nevertheless, essential for certain operations in smart card applications; in particular, it requires much less time for RAM locations to be read or written by the chip’s processor unit. This can be extremely important when the smart card is interacting with a PC application in which the timing of responses from the card to the PC are important; this is often the case in the mobile telecommunications area (that is, smart card-based cellular telephones).</P>
<P>The net result is that smart card chips tend to make use of varying amounts of each memory type, depending on the specific application for which the smart card is to be used. The most powerful chips used in smart cards today have RAM sizes in the 256-byte to 1-KB range, ROM sizes in the 16-KB to 32-KB range, and EEPROM sizes in the 1-KB to 16-KB range.</P><P><BR></P>
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