.include  MMRegs.h 
 		.ref ms_delay ,us_delay 
 		.ref _write_command,_write_data
		.global _InitC5402 ,_Write_lcd,_OpenMcBSP,_CloseMcBSP 
		.global _READAD50,_Int,_init_lcm,_InitMcBSP0
        .global _send_0,_send_1,_send_2,_send_end
        .global _ddram_clear
;===============================================		
_InitC5402:
	LD #0, DP 		; reset data–page pointer
	STM #0, CLKMD 	; software setting of DSP clock
	STM #0, CLKMD 	; (to divider mode before setting)
TstStatu1:
    LDM CLKMD, A
    AND #01b, A ;poll STATUS bit
    BC TstStatu1, ANEQ	
	STM #0x17FF, CLKMD ; set C5402 DSP clock to 10MHz
******* Configure C5402 System Registers *******
    STM #0x3FA0,PMST
    STM #0x0800,ST0
    STM #0x6900,ST1 	; ST1 at default setting(note:INTX=1)
******* Initialize McBSP1 Registers *******
	STM SPCR1, McBSP1_SPSA ; register subaddr of SPCR1
	STM #0000h, McBSP1_SPSD ; McBSP1 recv = left杍ustify
; RINT generated by frame sync
	STM SPCR2, McBSP1_SPSA ; register subaddr for SPCR2
; XINT generated by frame sync
	STM #0000h, McBSP1_SPSD ; McBSP1 Tx = FREE(clock stops
; to run after SW breakpoint
	STM RCR1, McBSP1_SPSA ; register subaddr of RCR1
	STM #0040h, McBSP1_SPSD ; recv frame1 Dlength = 16 bits
	STM RCR2, McBSP1_SPSA ; register subaddr of RCR2 
	STM #0040h, McBSP1_SPSD ; recv Phase = 1
; ret frame2 Dlength = 16bits
	STM XCR1, McBSP1_SPSA ; register subaddr of XCR1
	STM #0040h, McBSP1_SPSD ; set the same as recv
	STM XCR2, McBSP1_SPSA ; register subaddr of XCR2
	STM #0040h, McBSP1_SPSD ; set the same as recv
	STM PCR, McBSP1_SPSA ; register subaddress of PCR
	STM #000eh, McBSP1_SPSD ; clk and frame from external (slave)
   	STM #0x0000, IMR ; disable peripheral interrupts
	STM #0xFFFF, IFR ; clear the intrupts