?? msp430x21x2_ta0_12.c
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//******************************************************************************
// MSP430F21x2 Demo - Timer0_A3, Toggle P1.1/TA0_0, Up Mode, HF XTAL ACLK
//
// Description: Toggle P1.1 using hardware TA0_0 output. Timer0_A3 is configured
// for up mode with TA0CCR0 defining period, TA0_0 also output on P1.1. In this
// example, TA0CCR0 is loaded with 500-1 and TA0_0 will toggle P1.1 at TA0CLK/500.
// Thus the output frequency on P1.1 will be the TA0CLK/1000. No CPU or
// software resources required.
// ACLK = MCLK = TA0CLK = HF XTAL
// //* HF XTAL REQUIRED AND NOT INSTALLED ON FET *//
// //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
// As coded with TA0CLK = ACLK, P1.1 output frequency = HF XTAL/1000
//
// MSP430F21x2
// -----------------
// /|\| XIN|-
// | | | HF XTAL (3
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