*                       - DMA1_FLAG_GL4: DMA1 Channel4 global flag.
*                       - DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
*                       - DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
*                       - DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
*                       - DMA1_FLAG_GL5: DMA1 Channel5 global flag.
*                       - DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
*                       - DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
*                       - DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
*                       - DMA1_FLAG_GL6: DMA1 Channel6 global flag.
*                       - DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
*                       - DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
*                       - DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
*                       - DMA1_FLAG_GL7: DMA1 Channel7 global flag.
*                       - DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
*                       - DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
*                       - DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
*                       - DMA2_FLAG_GL1: DMA2 Channel1 global flag.
*                       - DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
*                       - DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
*                       - DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
*                       - DMA2_FLAG_GL2: DMA2 Channel2 global flag.
*                       - DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
*                       - DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
*                       - DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.
*                       - DMA2_FLAG_GL3: DMA2 Channel3 global flag.
*                       - DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag.
*                       - DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag.
*                       - DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag.
*                       - DMA2_FLAG_GL4: DMA2 Channel4 global flag.
*                       - DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag.
*                       - DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag.
*                       - DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag.
*                       - DMA2_FLAG_GL5: DMA2 Channel5 global flag.
*                       - DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag.
*                       - DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag.
*                       - DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.
* Output         : None
* Return         : None
*******************************************************************************/
void DMA_ClearFlag(u32 DMA_FLAG)
{
  /* Check the parameters */
  assert_param(IS_DMA_CLEAR_FLAG(DMA_FLAG));

  /* Calculate the used DMA */
  if ((DMA_FLAG & FLAG_Mask) != (u32)RESET)
  {
    /* Clear the selected DMA flags */
    DMA2->IFCR = DMA_FLAG;
  }
  else
  {
    /* Clear the selected DMA flags */
    DMA1->IFCR = DMA_FLAG;
  }
}

/*******************************************************************************
* Function Name  : DMA_GetITStatus
* Description    : Checks whether the specified DMAy Channelx interrupt has 
*                  occurred or not.
* Input          : - DMA_IT: specifies the DMA interrupt source to check. 
*                    This parameter can be one of the following values:
*                       - DMA1_IT_GL1: DMA1 Channel1 global interrupt.
*                       - DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
*                       - DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
*                       - DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
*                       - DMA1_IT_GL2: DMA1 Channel2 global interrupt.
*                       - DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
*                       - DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
*                       - DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
*                       - DMA1_IT_GL3: DMA1 Channel3 global interrupt.
*                       - DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
*                       - DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
*                       - DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
*                       - DMA1_IT_GL4: DMA1 Channel4 global interrupt.
*                       - DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
*                       - DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
*                       - DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
*                       - DMA1_IT_GL5: DMA1 Channel5 global interrupt.
*                       - DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
*                       - DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
*                       - DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
*                       - DMA1_IT_GL6: DMA1 Channel6 global interrupt.
*                       - DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
*                       - DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
*                       - DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
*                       - DMA1_IT_GL7: DMA1 Channel7 global interrupt.
*                       - DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
*                       - DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
*                       - DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
*                       - DMA2_IT_GL1: DMA2 Channel1 global interrupt.
*                       - DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
*                       - DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
*                       - DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
*                       - DMA2_IT_GL2: DMA2 Channel2 global interrupt.
*                       - DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
*                       - DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
*                       - DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
*                       - DMA2_IT_GL3: DMA2 Channel3 global interrupt.
*                       - DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
*                       - DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
*                       - DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
*                       - DMA2_IT_GL4: DMA2 Channel4 global interrupt.
*                       - DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
*                       - DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
*                       - DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
*                       - DMA2_IT_GL5: DMA2 Channel5 global interrupt.
*                       - DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
*                       - DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
*                       - DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
* Output         : None
* Return         : The new state of DMA_IT (SET or RESET).
*******************************************************************************/
ITStatus DMA_GetITStatus(u32 DMA_IT)
{
  ITStatus bitstatus = RESET;
  u32 tmpreg = 0;

  /* Check the parameters */
  assert_param(IS_DMA_GET_IT(DMA_IT));

  /* Calculate the used DMA */
  if ((DMA_IT & FLAG_Mask) != (u32)RESET)
  {
    /* Get DMA2 ISR register value */
    tmpreg = DMA2->ISR ;
  }
  else
  {
    /* Get DMA1 ISR register value */
    tmpreg = DMA1->ISR ;
  }

  /* Check the status of the specified DMA interrupt */
  if ((tmpreg & DMA_IT) != (u32)RESET)
  {
    /* DMA_IT is set */
    bitstatus = SET;
  }
  else
  {
    /* DMA_IT is reset */
    bitstatus = RESET;
  }
  /* Return the DMA_IT status */
  return  bitstatus;
}

/*******************************************************************************
* Function Name  : DMA_ClearITPendingBit
* Description    : Clears the DMAy Channelx抯 interrupt pending bits.
* Input          : - DMA_IT: specifies the DMA interrupt pending bit to clear.
*                    This parameter can be any combination (for the same DMA) of
*                    the following values:
*                       - DMA1_IT_GL1: DMA1 Channel1 global interrupt.
*                       - DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
*                       - DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
*                       - DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
*                       - DMA1_IT_GL2: DMA1 Channel2 global interrupt.
*                       - DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
*                       - DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
*                       - DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
*                       - DMA1_IT_GL3: DMA1 Channel3 global interrupt.
*                       - DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
*                       - DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
*                       - DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
*                       - DMA1_IT_GL4: DMA1 Channel4 global interrupt.
*                       - DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
*                       - DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
*                       - DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
*                       - DMA1_IT_GL5: DMA1 Channel5 global interrupt.
*                       - DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
*                       - DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
*                       - DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
*                       - DMA1_IT_GL6: DMA1 Channel6 global interrupt.
*                       - DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
*                       - DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
*                       - DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
*                       - DMA1_IT_GL7: DMA1 Channel7 global interrupt.
*                       - DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
*                       - DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
*                       - DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
*                       - DMA2_IT_GL1: DMA2 Channel1 global interrupt.
*                       - DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
*                       - DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
*                       - DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
*                       - DMA2_IT_GL2: DMA2 Channel2 global interrupt.
*                       - DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
*                       - DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
*                       - DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
*                       - DMA2_IT_GL3: DMA2 Channel3 global interrupt.
*                       - DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
*                       - DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
*                       - DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
*                       - DMA2_IT_GL4: DMA2 Channel4 global interrupt.
*                       - DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
*                       - DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
*                       - DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
*                       - DMA2_IT_GL5: DMA2 Channel5 global interrupt.
*                       - DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
*                       - DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
*                       - DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
* Output         : None
* Return         : None
*******************************************************************************/
void DMA_ClearITPendingBit(u32 DMA_IT)
{
  /* Check the parameters */
  assert_param(IS_DMA_CLEAR_IT(DMA_IT));

  /* Calculate the used DMA */
  if ((DMA_IT & FLAG_Mask) != (u32)RESET)
  {
    /* Clear the selected DMA interrupt pending bits */
    DMA2->IFCR = DMA_IT;
  }
  else
  {
    /* Clear the selected DMA interrupt pending bits */
    DMA1->IFCR = DMA_IT;
  }
}

/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/