/******************************************************************************
													Copyright (c) Motorola 2000
File Name		 :	$RCSfile: s12_crg.h,v $		
	
Engineer		 :	$Author: estyger $

Location		 :	EKB

Date Created	 :	10/01/01

Current Revision :	$Revision: 1.1.1.1 $

Notes	:					

*******************************************************************************
Motorola reserves the right to make changes without further notice to any
product	herein to improve reliability, function	or design. Motorola does not
assume any liability arising out of the	application or use of any product,
circuit, or software described	herein;	neither	does it	convey any license
under its patent rights	nor the rights of others. Motorola products are	not
designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support life,
or for any other application in which the failure of the  Motorola product
could create a	situation where	personal injury	or death may occur. Should
Buyer purchase or use Motorola products for any such unintended or
unauthorized application, Buyer shall idemnify and hold Motorola and its
officers, employees, subsidiaries, affiliates, and distributors	harmless
against	all claims costs, damages, and expenses, and reasonable	attorney fees 
arising	out of,	directly or indirectly,	any claim of personal injury or	death
associated with	such unintended	or unauthorized use, even if such claim alleges
that Motorola was negligent regarding the design or manufacture	of the part.
Motorola and the Motorola logo*	are registered trademarks of Motorola Ltd.
******************************************************************************/

#ifndef S12_CRG_H
#define S12_CRG_H

/************************* System Include Files ******************************/


/************************* Project Include Files *****************************/
#include "stdtypes.h"

/************************* typedefs ******************************************/
typedef union uSYNR
  {
  UINT8	byte;
  struct
    {
    UINT8 syn	:6;		/*synthesizer bits, controls multiplication factor of PLL */
    UINT8		:2;		/*not used */
    }bit;
  }tSYNR;

typedef union uREFDV
  {
  UINT8	byte;
  struct
    {
    UINT8 refdv	:4;		/*allows finer granularity for pll ref freq	*/
    UINT8		:4;		/*not used */
    }bit;
  }tREFDV;

typedef union uCRGFLG
  {
  UINT8	byte;
  struct
    {
    UINT8 scm	:1;		/*self clock mode ststus (1: limp-home clock active) */
    UINT8 scmif	:1;		/*self clock mode interrupt flag */
	UINT8 track	:1;		/*track status*/
    UINT8 lock	:1;		/*lock status */
    UINT8 lockif	:1;		/*lock interrupt flag */
    UINT8		:1;		/*not used */
	UINT8 prof	:1;		/*power on reset flag */
	UINT8 rtif	:1;		/*real time interrupt flag */
    }bit;
  }tCRGFLG;

typedef union uCRGINT
  {
  UINT8	byte;
  struct
    {
	UINT8 		:1;		/*not used*/
    UINT8 scmIe	:1;		/*self clock mode interrupt enable */
	UINT8 		:2;		/*not used*/
    UINT8 lockie	:1;		/*lock interrupt enable */
    UINT8		:2;		/*not used */
	UINT8 rtie	:1;		/*real time interrupt enable */
    }bit;
  }tCRGINT;

typedef union uCLKSEL
  {
  UINT8	byte;
  struct
    {
    UINT8 copwai	:1;		/*not used */
    UINT8 rtiwai	:1;		/*module clock select */
    UINT8 cwai	:1;		/*not used */
    UINT8 pllwai	:1;		/*bus clock select slow	*/
    UINT8 roawai	:1;		/*bus clock select pll */
    UINT8 syswai	:1;		/*system clock stoped in wait mode */
    UINT8 pstp	:1;		/*pseudo stop mode enable */
    UINT8 pllsel	:1;		/*pll select */
    }bit;
  }tCLKSEL;

typedef union uPLLCTL
  {
  UINT8	byte;
  struct
    {
    UINT8 scme	:1;		/*self clock mode enable */
	UINT8 pce	:1;		/* COP enable during pseudo-stop */
	UINT8 pre	:1;		/* RTI enable during pseudo-stop */
    UINT8		:1;		/*not used */
    UINT8 acq	:1;		/*acquisition bandwidth*/
/* The bitfield aut0 was used instead of auto, as auto is a C keyword and may be
problematic to some compilers. */
    UINT8 aut0	:1;		/*automatic bandwidth control */
    UINT8 pllon	:1;		/*phase lock loop on */
    UINT8 cme	:1;		/*crystal monitor enable */
    }bit;
  }tPLLCTL;

typedef union uCOPCTL
  {			  
  UINT8	byte;
  struct
    {
    UINT8 cr		:3;		/*cop timer rate select */
    UINT8		:4;		/*not used */
    UINT8 wcop	:1;		/*window cop enable */
    }bit;
  }tCOPCTL;

typedef union uFORBYP		
  {
  UINT8	byte;
  struct
    {
    UINT8		:1;		/*not used */
    UINT8 fcm	:1;
    UINT8		:2;		/*not used */
    UINT8 pllbyp :1;
    UINT8		:1;		/*not used */
    UINT8 copbyp	:1;
    UINT8 rtibyp	:1;
    }bit;
  }tFORBYP;

typedef struct				
  {
            tSYNR	synr;	/*synthesizer register */
            tREFDV	refdv;	/*reference divider register */
  volatile  UINT8	ctflg;	/*clock generator test flags register	*/
  volatile  tCRGFLG	crgflg;	/*clock generator flags register */
   		   	tCRGINT	crgint;	/*clock generator interrupt control register */
            tCLKSEL	clksel;	/*clock generator clock select register */
  		    tPLLCTL	pllctl;	/*pll control register */
  		    UINT8	rtictl;	/*rti control register */
  		    tCOPCTL	copctl;	/*cop control register */
  volatile  tFORBYP	forbyp; /*crg force and bypass test register */
  		    UINT8	ctctl;	/*crg test control register */
  volatile  UINT8	armcop;	/*cop arming register (to reset write $55:$0AA) */
  }tCRG;


/************************* Extern Variables **********************************/


/************************* #Defines ******************************************/
#define SYN0	0x01	/*bit masks	*/
#define SYN1	0x02
#define SYN2	0x04
#define SYN3	0x08
#define SYN4	0x10
#define SYN5	0x20

#define REFDV0	0x01	/*bit masks	*/
#define REFDV1	0x02
#define REFDV2	0x04
#define REFDV3	0x08

#define SCM		0x01	/*bit masks	*/
#define SCMIF	0x02
#define TRACK	0x04	
#define LOCK	0x08	
#define LOCKIF	0x10	
#define PROF	0x40	
#define RTIF	0x80

#define SCMIE	0x02	/*bit masks	*/
#define LOCKIF	0x10	
#define RTIF	0x80

#define COPWAI	  0x01		/*bit masks */
#define RTIWAI	  0x02		
#define CWAI	  0x04		
#define PLLWAI	  0x08		
#define ROAWAI	  0x10		
#define SYSWAI	  0x20		
#define PSTP	  0x40		
#define PLLSEL	  0x80		

#define SCME	0x01	/*bit masks	*/
#define PCE		0x02
#define PRE		0x04
#define ACQ		0x10
#define AUTO	0x20
#define PLLON	0x40
#define CME		0x80

#define CR0		0x01	/*bit masks	*/
#define CR1		0x02
#define CR2		0x04
#define WCOP	0x80

#define FCM		0x02	/*bit masks	*/
#define PLLBYP	0x10
#define COPBYP	0x40
#define RTIBYP	0x80

/************************* Macros ********************************************/


/************************* Prototypes ****************************************/
void PLLStartup(void);

#endif	/* End of Header file !defined	*/