/******************************************************************************
													Copyright (c) Motorola 2001
File Name		 :	$RCSfile: s12_register.h,v $		
	
Engineer		 :	$Author: estyger $

Location		 :	EKB

Date Created	 :	18/12/00

Current Revision :	$Revision: 1.1.1.1 $

Notes	:					

*******************************************************************************
Motorola reserves the right to make changes without further notice to any
product	herein to improve reliability, function	or design. Motorola does not
assume any liability arising out of the	application or use of any product,
circuit, or software described	herein;	neither	does it	convey any license
under its patent rights	nor the rights of others. Motorola products are	not
designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support life,
or for any other application in which the failure of the  Motorola product
could create a	situation where	personal injury	or death may occur. Should
Buyer purchase or use Motorola products for any such unintended or
unauthorized application, Buyer shall idemnify and hold Motorola and its
officers, employees, subsidiaries, affiliates, and distributors	harmless
against	all claims costs, damages, and expenses, and reasonable	attorney fees 
arising	out of,	directly or indirectly,	any claim of personal injury or	death
associated with	such unintended	or unauthorized use, even if such claim alleges
that Motorola was negligent regarding the design or manufacture	of the part.
Motorola and the Motorola logo*	are registered trademarks of Motorola Ltd.
******************************************************************************/

#ifndef S12_REGISTERS_H
#define S12_REGISTERS_H

/************************* System Include Files ******************************/


/************************* Project Include Files *****************************/
#include "stdtypes.h"

/************************* typedefs ******************************************/

typedef union uPORTA
  {
  UINT8  byte;
  struct
    {
    UINT8 pta0    :1;     /*i/o port pins */
    UINT8 pta1    :1;
    UINT8 pta2    :1;
    UINT8 pta3    :1;
    UINT8 pta4    :1;
    UINT8 pta5    :1;
    UINT8 pta6    :1;
    UINT8 pta7    :1;
    }bit;
  }tPORTA;

typedef union uPORTB
  {
  UINT8  byte;
  struct
    {
    UINT8 ptb0    :1;     /*i/o port pins */
    UINT8 ptb1    :1;
    UINT8 ptb2    :1;
    UINT8 ptb3    :1;
    UINT8 ptb4    :1;
    UINT8 ptb5    :1;
    UINT8 ptb6    :1;
    UINT8 ptb7    :1;
    }bit;
  }tPORTB;

typedef union uDDRA
  {
  UINT8  byte;
  struct
    {
    UINT8 ddra0   :1;     /*data direction bits (0:input;1:output) */
    UINT8 ddra1   :1;
    UINT8 ddra2   :1;
    UINT8 ddra3   :1;
    UINT8 ddra4   :1;
    UINT8 ddra5   :1;
    UINT8 ddra6   :1;
    UINT8 ddra7   :1;
    }bit;
  }tDDRA;

typedef union uDDRB
  {
  UINT8  byte;
  struct
    {
    UINT8 ddrb0   :1;     /*data direction bits (0:input;1:output) */
    UINT8 ddrb1   :1;
    UINT8 ddrb2   :1;
    UINT8 ddrb3   :1;
    UINT8 ddrb4   :1;
    UINT8 ddrb5   :1;
    UINT8 ddrb6   :1;
    UINT8 ddrb7   :1;
    }bit;
  }tDDRB;

typedef union uPORTE
  {
  UINT8  byte;
  struct
    {
    UINT8 pte0    :1;     /*i/o port pins */
    UINT8 pte1    :1;
    UINT8 pte2    :1;
    UINT8 pte3    :1;
    UINT8 pte4    :1;
    UINT8 pte5    :1;
    UINT8 pte6    :1;
    UINT8 pte7    :1;
    }bit;
  }tPORTE;

typedef union uDDRE
  {
  UINT8  byte;
  struct
    {
    UINT8         :2;
    UINT8 ddre2   :1;     /*data direction bits (0:input;1:output) */
    UINT8 ddre3   :1;
    UINT8 ddre4   :1;
    UINT8 ddre5   :1;
    UINT8 ddre6   :1;
    UINT8 ddre7   :1;
    }bit;
  }tDDRE;

typedef union uPEAR
  {
  UINT8  byte;
  struct
    {
    UINT8        :2;     
    UINT8 rdwe   :1;     /*read/write enable */
    UINT8 lstre  :1;     /*low strobe enable */
    UINT8 neclk  :1;     /*no external eclk */
    UINT8 pipoe  :1;     /*pipe status signal output enable */
    UINT8        :1;     
    UINT8 noacce :1;     /*cpu no access output enable */
    }bit;
  }tPEAR;

typedef union uMODE
  { 
  UINT8  byte;
  struct
    {
    UINT8 eme    :1;     /*emulate port E */
    UINT8 emk    :1;     /*emulate port K  */
    UINT8        :1;     
    UINT8 ivis   :1;     /*internal visibility */
    UINT8        :1;     
    UINT8 moda   :1;     /*mode select bits */
    UINT8 modb   :1;
    UINT8 modc   :1;
    }bit;
  }tMODE;

typedef union uPUCR
  {
  UINT8  byte;
  struct
    {
    UINT8 pupae  :1;     /*pull-up port A enable */
    UINT8 pupbe  :1;     /*pull-up port B enable */
    UINT8        :2;     
    UINT8 pupee  :1;     /*pull-up port E enable */
    UINT8        :2;     
    UINT8 pupke  :1;     /*pull-up port K enable */
    }bit;
  }tPUCR;

typedef union uRDRIV
  {
  UINT8  byte;
  struct
    {
    UINT8 rdpa   :1;     /*reduced drive port A */
    UINT8 rdpb   :1;     /*reduced drive port B */
    UINT8        :2;     
    UINT8 rdpe   :1;     /*reduced drive port E */
    UINT8        :2;     
    UINT8 rdpk   :1;     /*reduced drive port K */
    }bit;
  }tRDRIV;

typedef union uEBICTL
  {
  UINT8  byte;
  struct
    {
    UINT8 estr   :1;     /*e-clock free running or bus control signal */
    UINT8        :7;     /*not used */
    }bit;
  }tEBICTL;

typedef union uINITRM
  {
  UINT8  byte;
  struct
    {
    UINT8        :1;     /*RAM hi or low alignment within 16K page  */
    UINT8        :2;     /*not used */
    UINT8 ram    :5;     /*internal ram map position */
    }bit;               
  }tINITRM;

typedef union uINITRG
  {
  UINT8  byte;
  struct
    {
    UINT8        :3;     /*not used */
    UINT8 reg    :5;     /*internal register map position */
    }bit;
  }tINITRG;

typedef union uINITEE
  {
  UINT8  byte;
  struct
    {
    UINT8 eeon   :1;     /*internal eeprom on */
    UINT8        :3;     /*not used */
    UINT8 ee     :4;     /*internal eeprom map position */
    }bit;
  }tINITEE;

typedef union uMISC
  {
  UINT8  byte;
  struct
    {
    UINT8 romon  :1;     /*enable flash */
    UINT8 romhm  :1;     /*flash only in second half of map */
    UINT8 exstr  :2;     /*external access clock stretch */
    UINT8        :4;     /*not used */
    }bit;
  }tMISC;

typedef union uMTST     /*memory test registers  */
  {
  UINT8  byte;
  struct
    {
    UINT8 bit    :8;     
    }bit;
  }tMTST;

typedef union uITCR
  {
  UINT8  byte;
  struct
    {
    UINT8 adr0   :1;     /*interrupt test control */
    UINT8 adr1   :1;
    UINT8 adr2   :1;
    UINT8 adr3   :1;
    UINT8 wrint  :1;
    UINT8        :3;     /*not used */
    }bit;
  }tITCR;

typedef union uITEST
  {
  UINT8  byte;
  struct
    {
    UINT8 int0   :1;     /*interrupt test register */
    UINT8 int2   :1;
    UINT8 int4   :1;
    UINT8 int6   :1;
    UINT8 int8   :1;
    UINT8 inta   :1;
    UINT8 intc   :1;
    UINT8 inte   :1;
    }bit;
  }tITEST;

typedef union uPARTID   /* bits 1:3 minor mask revs */
  {                     /* bits 4:7 major mask revs - inc fab x'fer */
  UINT16  word;           /* bits 8:11 minor family id */
  struct                /* bits 12:15 major family id */
    {
    UINT8 partidh;
    UINT8 partidl;
    }byte;
  }tPARTID;


typedef union uMEMSIZ0
  {
  UINT8  byte;
  struct
    {
    UINT8 ram_sw :3;     
    UINT8        :1;
    UINT8 eep_sw :2;
    UINT8        :1;
    UINT8 reg_sw :1;
    }bit;
  }tMEMSIZ0;

typedef union uMEMSIZ1
  {
  UINT8  byte;
  struct
    {
    UINT8 pag_sw :2;     
    UINT8        :4;
    UINT8 rom_sw :2;
    }bit;
  }tMEMSIZ1;

typedef union uIRQCR
  {
  UINT8  byte;
  struct
    {
    UINT8        :6;     /*not used */
    UINT8 irqen  :1;     /*external irq enable */
    UINT8 irqe   :1;     /*irq select edge sensitive only */
    }bit;
  }tIRQCR;


typedef union uHPRIO
  {
  UINT8  byte;
  struct
    {